What are the responsibilities and job description for the FPGA Verification Engineer position at I3 INFOTEK INC?
Job Summary
We are seeking an experienced FPGA Verification Engineer to work onsite in Mountain View, CA. The ideal candidate will have strong expertise in SystemVerilog, UVM-based verification, and a solid understanding of FPGA design principles and architectures. This role involves developing and executing verification strategies for complex FPGA designs in a collaborative engineering environment.
Key Responsibilities
- Develop and execute FPGA verification plans and testbenches using SystemVerilog and UVM
- Verify FPGA designs based on defined specifications and requirements
- Perform functional and code coverage analysis to ensure design quality
- Debug and resolve functional issues in simulation and verification environments
- Work closely with design engineers to identify and resolve design and verification issues
- Use industry-standard simulators and verification tools effectively
- Contribute to documentation and verification reports
Required Skills
- Strong understanding of FPGA design principles and architectures
- Proficiency in SystemVerilog and UVM verification methodology
- Hands-on experience with verification tools such as QuestaSim or Synopsys VCS
- Experience with functional coverage and code coverage
- Strong debugging, analytical, and problem-solving skills
- Excellent communication and teamwork abilities
Qualifications
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
- Proven experience in FPGA verification
- Experience with scripting languages such as Python or Perl
- Familiarity with Verilog and/or VHDL