AMD Versal / PL Integration & IPC (iRDK)

Drive AMD Versal SoC bringup for the iRDK platform, with a focus on programmable logic (PL) integration and inter-processor communication (IPC) with the AMD APU.

Responsibilities

●       Bring up AMD Versal SoC on iRDK custom board from EVK reference

●       Develop and validate PL integration: IP instantiation, configuration, AXI interfaces

●       Implement and validate IPC mechanisms between Versal AI Core / RPU and AMD APU (RPMsg, OpenAMP, shared memory)

●       Develop BSP and drivers for Versal PS subsystems (RPU and APU partitions)

●       Work with AMD/Xilinx on Versal platform tools (Vitis, Petalinux)

●       Validate real-time latency and data throughput across the PL–PS–APU boundary

●       Bring up Sample Applications on PL IP Integration, Versal/X86 Interfaces.

Qualifications

●       Bachelor''s or Master''s degree in Computer Science/Engineering or related field

●       5 years'' experience in Embedded Software Development

●       Hands-on Versal or Zynq UltraScale bringup experience

●       FPGA/PL Driver integration: Vitis HLS, IP integration, AXI interconnect

●       IPC implementation: RPMsg, OpenAMP, or shared-memory communication

●       Petalinux / Yocto, Xilinx/AMD SDK toolchain

●       C/C , Python/Rust; hardware debug and Xilinx debug tooling

Preferred Skills:

●       AMD Versal AI Core or Versal Premium hands-on experience

●       Automotive domain (ADAS or cockpit)

●       Safety-capable RPU lockstep configuration experience

●       DMA engine and high-bandwidth PL–PS data path experience