Demo

Post Silicon Validation Engineer

E-Solutions
Santa Clara, CA Full Time
POSTED ON 4/14/2026
AVAILABLE BEFORE 5/10/2026

Job Description & Skill Requirement:

Scope of Work:

• Power & Perf measurements under various use case scenarios, associated debugs and analysis

• DDR interface bring up and qualification activities

• PVT qualification & debug of systems (small and large sample size) intended for testing HW-SW co-working stability

• Electrical measurements of different IO interfaces, first level analysis & debugs

• Functional validation of IO interfaces


Required Qualifications:

• BE/B. tech with 2 years of experience

• Clarity on Digital design & Signal integrity basics

• Knowledge on schematics and PCB file usage, voltage regulator design concepts

• Familiarity with PC architecture, present day interfaces and & interactions of Software (BIOS, Driver & OS) with hardware

• Familiarity of working in lab environment and usage of equipment like DSO, Multimeter, Power supplies. Must know lab equipment specifications and considerations behind them.

• Excellent in programming using Python

• Proficiency in windows & Linux operating systems and Microsoft office tools

• Good analytical and reasoning skills

• Strong background in testing of Electronic Systems

• Excellent oral and written communication skills



Qualification:


BS/MS Electrical Engineering

Salary.com Estimation for Post Silicon Validation Engineer in Santa Clara, CA
$119,193 to $139,083
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