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DFT Engineer

E-Solutions
Santa Clara, CA Full Time
POSTED ON 5/13/2026
AVAILABLE BEFORE 6/10/2026

Job Title: DFT Engineer

Job Location: Santa Clara, California (Onsite)

Type of Hire : Full time or Contract

Mode of interview - Virtual


Job Description & Skill Requirement:


Familiarity with the Siemens suite of DFT tools

DFT insertion for SCAN (with SSN) and MBIST

MBIST Repair Implementation and Verification

Generating collaterals for Test Timing and Place and Route

Expertise in IJTAG 1687 standard and good at understanding ICL and PDL standard Spec

Verification of DFT features including

Boundary Scan

JTAG

SCAN

MBIST

High Speed IO

ATPG

DRC debug

Coverage Analysis

Pattern Generation for different fault models



Required Skills & Qualifications

• 5 years of hands-on experience in DFT and ATPG for SoC or ASIC designs

• Strong understanding of DFT fundamentals including controllability, observability, and scan-based testing

• Proven expertise in ATPG pattern generation, analysis, and debug

• Experience with MBIST, including memory test architectures and diagnostics

• Knowledge of IO Test methodologies for interface and pin level validation

• Solid understanding of clock DFT and clock verification concepts

• Strong grasp of digital design and RTL fundamentals

• Experience with industry standard DFT/ATPG EDA tools

• Ability to work effectively in fast paced, high performance semiconductor programs

• Strong analytical, problem solving, and communication skills


Qualification:

• BE

Salary.com Estimation for DFT Engineer in Santa Clara, CA
$104,000 to $124,830
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