What are the responsibilities and job description for the FPGA Design Engineer position at Catapult Federal Services?
*Secret Clearance Required* (or ability to obtain) *NO C2C*
Schedule: 9/80 schedule & 8am start time
Location: Reston, VA
Job Type: 3-6 Month Contract-To-Hire
This role is part of a high-performing design team delivering FPGA/ASIC solutions for high-speed cryptographic and communication systems. The engineer will architect, implement, and validate complex digital designs targeting Xilinx Zynq/MPSOC FPGAs and ASICs in mission-critical programs.
Responsibilities
- Derive and implement detailed FPGA/ASIC architectures from system requirements
- Execute RTL and/or HLS design using VHDL or C
- Perform verification, synthesis, STA, and lab debug on Linux-based SoCs
- Integrate and validate hardware/software interfaces and performance
- Support silicon/FPGA bring-up, characterization, and production ramp
- Participate in peer reviews, documentation, and test plan development
Required Skills
- Bachelor’s or Master’s in Electrical Engineering or related field
- 4 years FPGA/ASIC design experience (2 with a Master’s)
- Proficient in VHDL and Xilinx Vivado design flow
- Strong experience with Ethernet/TCP/IP protocols
- Active Secret Clearance (or ability to obtain)
Preferred Skills
- HLS (Vivado or Mentor Calypto)
- SystemVerilog, UVM, or SVA
- C / OOP
- Xilinx MPSOC design and debugging
- Mentor EDA CDC/Lint/RDC tools
- DO-254 or Aerospace/Defense background
