Silicon Validation Engineer

Agility Partners is seeking a qualified High-Speed I/O Validation Engineer to fill an open position with a Fortune 15 company based in the greater Seattle area. This role offers an exciting opportunity to work on next-generation data center SoC products, contributing to cutting-edge silicon validation and high-speed interface development. You will collaborate with cross-functional teams on PCIe, CXL, and chip-to-chip interconnects while performing rigorous signal and power integrity analysis to ensure top-tier system performance. This position allows hands-on experience with advanced lab equipment, automation frameworks, and real-world SoC validation under PVT stress conditions.

Responsibilities:

• Execute bring-up, validation, and debug of high-speed I/O interfaces (PCIe Gen5/Gen6, CXL, Die-to-Die interconnects).
• Develop and implement validation plans, test methodologies, and automation frameworks for compliance and margining.
• Perform signal integrity (SI) and power integrity (PI) analysis, including jitter, crosstalk, BER, and channel loss characterization.
• Validate interface performance under PVT (Process, Voltage, Temperature) stress conditions.

Qualifications:

• BS/MS in Electrical or Computer Engineering (or equivalent experience).
• 5 years in high-speed I/O validation or related roles.
• Hands-on experience with PCIe, CXL, UCIE, and chip-to-chip interconnects.
• Strong understanding of SI/PI fundamentals, timing analysis, and power management.
• Familiarity with firmware-driver interactions and SoC architecture.
• Proficiency in debugging tools and scripting for test automation (Python/Perl).
• Ability to work in a fast-paced, cross-functional environment.

*Must be local to Hillsboro, Oregon *OR* Willing to relocate!!