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Sr. SIPI Engineer

Advanced Micro Devices, Inc
San Jose, CA Full Time
POSTED ON 6/19/2026
AVAILABLE BEFORE 12/15/2026


WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  




THE ROLE: 

As a member of this team you will ensure the performance requirements of the silicon and the cost requirements of the product are met through the integration of silicon, package and platform electrical design. Packaging Signal Integrity also provides design support to engineering design teams for both current and forward-looking product development and feasibility studies. We have competitive benefit packages and an award-winning culture. Join us! 

 

 

KEY RESPONSIBILITIES:

  • Responsible for Signal Integrity and Power Integrity simulations at feasibility, pre-layout, post-layout phases of AECG characterization board and demo board design. Establish design and layout guidelines.
  • Responsible for coordinating with HW design team, layout team, NPI and manufacturing vendors to resolve SI/PI related issues.
  • Responsible for end-to-end channel simulations for multi gigabit serial lines like 56Gbps, 112Gbps and beyond.
  • Responsible for SI and timing margin simulations of HBM/ /DDR4/LPDDR4/DDR5/LPDDR5 and other memory buses.
  • Responsible for characterizing the various interfaces in the product and verifying the simulations against measurements.
  • Responsible for preparation of and implementing checklists for various stages of PCB development.
  • Worked with architecture team, package design team and PCB design team for future PCB technology.
  • Update the SIPI design and analysis flow and automate the process.

 

PREFERRED EXPERIENCE:

  • Excellent analytical and problem-solving skills along with attention to details.
  • Need a self-starter, someone able to drive tasks independently and efficiently to completion.
  • Strong/effective communication skills.
  • Enthusiastic team-first mentality.
  • Experience with PCB, Package and IC level power delivery networks. 
  • Experience in silicon packaging and PCB design for signal and power integrity. 
  • Experience with high-speed digital signaling interfaces such as PCIE, GDDR6, HDMI. 
  • Expertise in electrical modeling EDA and AMS tools such as ADS, HFSS, SIwave, HSPICE. 
  • Expertise in electromagnetic theory and circuit analysis. 
  • Experience with programming in Python, C , Matlab.  

 

ACADEMIC CREDENTIALS:

MS or PhD in Electrical Engineering

 

LOCATION:

San Jose, CA

 

#LI-GW1

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Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Salary.com Estimation for Sr. SIPI Engineer in San Jose, CA
$100,194 to $113,818
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