What are the responsibilities and job description for the ASIC/VLSI design engineer position at YO IT Consulting?
Location: Austin, TX (Onsite, 5 days/week)
Job Type: Full-Time
About The Opportunity
A fast-growing Series-D semiconductor innovator is building programmable coherent DSP solutions for next-generation cloud and AI infrastructure. This role offers the chance to design cutting-edge communication systems from scratch while working with industry experts in a well-funded, high-impact environment.
Key Responsibilities
Candidates from leading semiconductor and chip design companies preferred, including (but not limited to): Broadcom, AMD, Nvidia, Qualcomm, Synopsys, Cadence, Marvell, Intel, Lattice, Infineon, GlobalFoundries, TI, and similar organizations.
Job Type: Full-Time
About The Opportunity
A fast-growing Series-D semiconductor innovator is building programmable coherent DSP solutions for next-generation cloud and AI infrastructure. This role offers the chance to design cutting-edge communication systems from scratch while working with industry experts in a well-funded, high-impact environment.
Key Responsibilities
- Work with algorithm and architecture teams to translate high-level requirements into hardware designs
- Analyze protocols (e.g., Ethernet) and apply them in design
- Contribute across all design stages:
- Micro-architecture definition
- RTL coding (Verilog/SystemVerilog)
- Timing-aware, synthesis-friendly design
- Collaborate with:
- Verification (testbenches, debug, coverage)
- DFT (scan, ATPG, BIST)
- Physical design (floorplanning, timing, routing)
- Participate in design reviews and present design decisions
- Run synthesis, generate SDC constraints, analyze timing reports
- Debug functional and timing issues in pre- and post-silicon stages
- Optimize for area, power, and performance (PPA)
- Prepare documentation (micro-architecture specs, interfaces, design guides)
- Support IP/SoC integration and system-level interfaces
- Optional: contribute to silicon bring-up and post-silicon validation
- Stay updated on EDA tools, verification methodologies, CDC/linting practices
- 5 years of ASIC/VLSI design experience
- Proficiency in RTL coding using Verilog/SystemVerilog
- Strong understanding of modern ASIC design flows including:
- High-speed design
- Low-power techniques
- Third-party IP integration
- Lint, CDC, RDC, SVA
- Synthesis and SDC constraints
- Bachelor’s or Master’s degree in Electrical or Computer Engineering
- DFT knowledge (scan, ATPG, BIST)
- Experience with DSP-oriented design blocks
- Experience with optical communication systems
- Experience with 100G Ethernet
- Scripting skills (Python, Perl, TCL)
- IP/SoC integration experience
- Strong teamwork, communication, and problem-solving abilities
- Self-starter mindset and ability to work independently
- Base salary: $160,000 - $180,000
- Equity package
- Full medical & dental benefits
- H1-B sponsorship available
- Onsite in Austin is mandatory
Candidates from leading semiconductor and chip design companies preferred, including (but not limited to): Broadcom, AMD, Nvidia, Qualcomm, Synopsys, Cadence, Marvell, Intel, Lattice, Infineon, GlobalFoundries, TI, and similar organizations.
Salary : $160,000 - $180,000