What are the responsibilities and job description for the FPGA Design Engineer position at Wolverine Trading?
Department: Technology
Location: Chicago, IL
Description
Wolverine Trading is seeking an experienced FPGA design engineer to build high-speed, low latency systems targeting trading applications. The position requires designing and implementing hardware-based solutions for systems through collaboration with traders and quantitative analysts. The applicant must be highly driven and possess strong analytical and interpersonal skills.
What You’ll Do
Our flat organizational structure promotes teamwork across the Firm and offers easy access to senior staff. While we work exceptionally well as a team in the office, our bonds are further strengthened through company events, activities and giving back. Volleyball, soccer, hockey, 5K runs, picnic, parties, and trivia nights provide friendly competition and build better relationships. By getting out of our usual environment and doing out-of-the-ordinary things together, we foster creativity and broaden our imaginations to accomplish new challenges.
Benefits
Location: Chicago, IL
Description
Wolverine Trading is seeking an experienced FPGA design engineer to build high-speed, low latency systems targeting trading applications. The position requires designing and implementing hardware-based solutions for systems through collaboration with traders and quantitative analysts. The applicant must be highly driven and possess strong analytical and interpersonal skills.
What You’ll Do
- Design and implement low-latency Hardware-based trading solutions
- Collaborate with traders, quantitative analysts and low-level SW Engineers
- Push performance boundaries on FPGAs
- Analyze and resolve real-time system bottlenecks and issues and improve trading performance
- Expert knowledge of SystemVerilog, FPGA design, and industry standard tools
- Proficiency verifying designs through simulation and building verification environments
- In-depth knowledge of advanced FPGA synthesis techniques and implementation constraints for high-speed timing closure
- Experience with system-on-chip (SoC) architectures, memory & processor subsystems, and peripheral interconnects
- Low level expertise in high speed Gb transceivers, MACs, and PHYs
- Critical thinkers with ability to analyze complex, multi-variable systems
- Degree in Electrical Engineering or Computer Engineering with a focus on digital systems or computer networks
- Experience with schematic capture and PCB design and debug is a plus
- 3 years experience working with FPGA and/or ASIC designs required
- No prior experience in the finance industry required
Our flat organizational structure promotes teamwork across the Firm and offers easy access to senior staff. While we work exceptionally well as a team in the office, our bonds are further strengthened through company events, activities and giving back. Volleyball, soccer, hockey, 5K runs, picnic, parties, and trivia nights provide friendly competition and build better relationships. By getting out of our usual environment and doing out-of-the-ordinary things together, we foster creativity and broaden our imaginations to accomplish new challenges.
Benefits
- Highly competitive salary & bonus opportunity
- Generous paid time off and flexible scheduling
- 100% coverage of medical, dental, vision, life, and disability benefits for single coverage
- Generous Paid Parental Leave
- Retirement Plans: 401K and Roth 401K
- Profit sharing plan
- Long- and short-term disability
- Free breakfast and lunch from our in-house kitchen with rotating menus (including snacks!)
- On-site gym with a subsidized membership
- Frequent company outings
- Opportunity to give back to organizations that help individuals in need in the Chicagoland area
- In-house education team – classes and resources are offered for continuous learning opportunities
- Mentorship Program through your first six months of employment
Salary : $110,000 - $160,000