What are the responsibilities and job description for the Semiconductor Packaging engineer position at Vista Applied Solutions Group Inc?
Job Summary
This role is highly specialized in semiconductor packaging design, requiring strong EDA tool proficiency and knowledge of advanced packaging technologies.
Responsibilities:
- Tools & Knowledge:
- Mentor/Siemens and Cadence tools (especially for Package Layout Automation - PLA).
- Technical Expertise:
- Multi-layer package design experience.
- Understanding of substrate manufacturing Design Rules and Assembly Rules.
- Familiarity with SIPI (Signal Integrity & Power Integrity) Rules.
- Flip-chip package design concepts.
- Tasks:
- Perform point-to-point connections.
- Run DRC (Design Rule Checks), identify root causes, and fix issues.
Execute design based on provided schematics, including component placement and constraint setup
Senior Principal Engineer - Networking/Switching Silicon Semiconductor AI Infras
Marvell Semiconductor, Inc. -
Santa Clara, CA
Semiconductor Packaging Technical Leader (HYBRID)
Lensa -
San Jose, CA
Embedded Software Application Engineer
Alif Semiconductor -
Pleasanton, CA