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RTL Design Engineer III

Ursus, Inc.
Sunnyvale, CA Contractor
POSTED ON 5/12/2026
AVAILABLE BEFORE 6/10/2026

JOB TITLE: RTL Design Engineer III
LOCATION: Austin, TX or Sunnyvale, CA
DURATION: 12 Months
PAY RANGE: $73 - $83/hr.

TOP 3 SKILLS:
  • Power analysis and reduction (with industry tools)
  • RTL-to-GDSII flow and low-power implementation
  • Python scripting and ML/AI for automation and modeling

Company:
Our client is a Fortune 500 multi-national technology company headquartered in Menlo Park, CA.

Responsibilities:
  • Perform comprehensive power analysis at various design stages, spanning from RTL to GDSII.
  • Contribute to the development, improvement, and automation of various power analysis flows. This includes gathering and analyzing large datasets for power modeling via automated processes.
  • Investigate and address power inefficiencies, providing actionable feedback to the RTL design team.

Minimum Qualifications:
  • Demonstrated experience with RTL-to-GDSII design flow usage and development in advanced technology nodes (7nm and below).
  • Expertise in low-power implementation and signoff, including power gating, multiple voltage rails, and Unified Power Format (UPF) usage.
  • Proven experience in power analysis and reduction utilizing industry-standard tools such as PrimeTime PX/PrimePower.
  • Proficiency in scripting languages, with a strong emphasis on Python and ML/AI frameworks.
  • Working knowledge of RTL design principles.
  • Experience in RTL power optimization using specialized tools like Power-Artist.
  • Ability to learn quickly, explore new ideas, and iterate rapidly to achieve optimal results.

Preferred Qualifications:
  • Experience with synthesis and Place and Route (PnR) flows.
  • Experience analyzing Intellectual Property (IP) design for power characteristics and building run-time estimation models for use by software/firmware teams.
  • Skills in data analysis and data modeling, including the application of machine learning approaches.

Must-Have Skills:
  • Power analysis and reduction (with industry tools)
  • RTL-to-GDSII flow and low-power implementation
  • Python scripting and ML/AI for automation and modeling

Nice-to-Have Skills:
  • Experience with synthesis and Place and Route (PnR) flows.
  • Experience analyzing Intellectual Property (IP) design for power characteristics and building run-time estimation models for use by software/firmware teams.
  • Skills in data analysis and data modeling, including the application of machine learning approaches.

Degrees/Certifications:
  • Must Have: Bachelor degree in Electrical/Computer Engineering or Computer Science
  • Master's Degree preferred but not required


Pursuant to the California Fair Chance Act, Los Angeles County Fair Chance Ordinance for Employers, Los Angeles Fair Chance Initiative for Hiring Ordinance, and San Francisco Fair Chance Ordinance, qualified applicants will be considered for assignment with arrest and conviction records. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness, meet client expectations, standards, and accompanying requirements, and safeguard business operations and company reputation.

BENEFITS SUMMARY: Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate or annual salary only, unless otherwise stated. In addition to base compensation, full-time roles are eligible for Medical, Dental, Vision, Commuter and 401K benefits with company matching.


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Salary : $73 - $83

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