Demo

CAD Engineer

TETRAMEM INC
San Jose, CA Full Time
POSTED ON 5/7/2026
AVAILABLE BEFORE 7/6/2026

Responsibilities:

  • Development of in-house CAD tools for analog design, analog layout, database management, digital frontend and backend, SoC sign-off
  • Automation in design and verification flow using languages such as tcl, skill, or python
  • Collaborate with design engineer, verification engineer, IT, and EDA vendor to optimize EDA license usage
  • Drive innovation by researching and implementing advanced CAD methodologies that either increase productivity or reduce EDA cost
  • Mentor and provide technical guidance to junior engineers, fostering a culture of continuous learning and professional development.
  • Participate in design reviews, provide constructive feedback, and contribute to the improvement of design processes and standards.

Requirements:

  • Degree in Electrical Engineering or Computer Engineering, with experience in analog or digital IC design flow and CAD methodology.
  • 10 years of experience in CAD engineering, with at least 2 years of experience in <28nm technology node EDA methodology
  • Strong knowledge of analog design, custom layout and physical verification flows
  • Familiar with common EDA environment tools (e.g., Synopsys, Cadence, Siemens etc.), include licensing, environment setup, automation API, and have working knowledge on tool usage
  • Experience with at least one of SKILL or TCL
  • Proficient with UNIX based operating system, file management, disk management and security
  • Ability to automate design methodologies and create productivity scripts with design engineers
  • Ability to work in a startup environment and to work both independently and as a team player


The following skillsets will be considered a strong asset:

  • Experience with circuit or layout design in Cadence environment
  • Experience with ASIC design in Synopsys environment

Salary Range: $110,000 - $250,000 / year

Salary : $110,000 - $250,000

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