Application Specific Integrated Circuit Verification Engineer

As discussed on the call, I’m sharing the DV requirements below. Please send resumes of suitable candidates along with a brief 3–4 lines summary for each profile when you attach them. Once we review the resumes, we can begin scheduling interviews starting next week.

We already emphasized that we’re looking for strong SoC DV candidates. System-level experience is highly preferred. Familiarity with PCIe, HBM, Ethernet, or D2D is a plus. Here’s a general checklist for candidates please have them describe their experience in these areas as part of the summary when you send candidates to me for submission.

• Strong SystemVerilog and UVM skills
• Scripting experience (Python/Perl/Shell) is a plus
• C-based verification experience is a plus
• Experience with infrastructure tasks (testbench development, VIP integration, etc.)
• Solid debugging and problem-solving skills
• Good communication skills