What are the responsibilities and job description for the Design Verification Engineer position at Talent 101?
5-8 years of
experience. PRIMARY ACTIVITIES: Verification of complex Digital and Mixed Signal with focus on system level operation and performance. Responsible for
module, chip and system verification of highly complex digital systems. Primary
responsibilities will include: verification planning, testbench development,
test case development, test case debug, coverage analysis, and metric/status
reporting. Testbench development will include defining the architecture and
implementation of: directed random test generators, coverage models, reference
models and bus functional models. Test case development will include the use of
directed random test generators, device driver and system applications. Draw
conclusions from code, functional and assertion coverage. Development of
coverage-driven, pseudo-random module and chip level test strategies, test
plans, and test cases using module level and system level techniques.
RELATED ACTIVITIES: Write documentation, including emulator set-up, validation report, and verification hand-off. Validate/debug devices by writing c level test cases on bench setup (emulator).
Define experiments to identify root cause of problems. May include verification of SOC ASICs in an emulation environment and final silicon verification/characterization. Responsible for all test software required to verify a SOC ASIC. May include integrating new designs into hardware emulator.
RELATED ACTIVITIES: Write documentation, including emulator set-up, validation report, and verification hand-off. Validate/debug devices by writing c level test cases on bench setup (emulator).
Define experiments to identify root cause of problems. May include verification of SOC ASICs in an emulation environment and final silicon verification/characterization. Responsible for all test software required to verify a SOC ASIC. May include integrating new designs into hardware emulator.