What are the responsibilities and job description for the ASIC Digital Design (DFT/Scan) - 16907 position at Synopsys Inc?
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You bring extensive experience in ASIC digital design, with deep knowledge of DFT and scan methodologies. You’re a technical leader, adept at collaborating across teams and mentoring others. You thrive in complex environments, solving challenges and ensuring quality, reliability, and testability in silicon products. Your communication skills and attention to detail set you apart, and you enjoy working in a diverse, innovative team.
What You’ll Be Doing:
Join a collaborative team of ASIC and DFT experts in Hillsboro, Oregon, focused on delivering high-performance and testable silicon solutions.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will provide more details about salary and benefits during the hiring process.
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You bring extensive experience in ASIC digital design, with deep knowledge of DFT and scan methodologies. You’re a technical leader, adept at collaborating across teams and mentoring others. You thrive in complex environments, solving challenges and ensuring quality, reliability, and testability in silicon products. Your communication skills and attention to detail set you apart, and you enjoy working in a diverse, innovative team.
What You’ll Be Doing:
- Architecting and implementing DFT/scan solutions for ASICs.
- Defining and executing test strategies with cross-functional teams.
- Integrating scan insertion and ATPG flows.
- Mentoring engineers in DFT best practices.
- Optimizing RTL for scan readiness.
- Collaborating with manufacturing partners to improve yield.
- Advance Synopsys’ ASIC quality and reliability.
- Accelerate test development and silicon delivery.
- Boost yield and manufacturability.
- Drive innovation in scan architecture.
- Empower team growth and expertise.
- Support industry-leading chip solutions.
- Expertise in ASIC digital design and RTL coding.
- Strong background in DFT/scan architecture and ATPG.
- Experience with scan tools (e.g., Synopsys, Mentor, Cadence).
- Knowledge of silicon manufacturing and yield optimization.
- Leadership and mentoring abilities.
- Analytical and detail-oriented.
- Collaborative and communicative.
- Proactive leader.
- Continuous learner.
Join a collaborative team of ASIC and DFT experts in Hillsboro, Oregon, focused on delivering high-performance and testable silicon solutions.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will provide more details about salary and benefits during the hiring process.