Sr. Staff Design Verification Engineer

Description

Synaptics is leading the charge in AI at the Edge, bringing AI closer to end users and transforming how we engage with intelligent connected devices, whether at home, at work, or on the move. As the go-to partner for the world’s most forward-thinking product innovators, Synaptics powers the future with its cutting-edge Synaptics Astra™ AI-Native embedded compute, Veros™ wireless connectivity, and multimodal sensing solutions. We’re making the digital experience smarter, faster, more intuitive, secure, and seamless. From touch, display, and biometrics to AI-driven wireless connectivity, video, vision, audio, speech, and security processing, Synaptics is the force behind the next generation of technology enhancing how we live, work, and play.

Overview

Synaptics is looking for a Sr. Staff Design Verification Engineer to join our Silicon Engineering team. You will develop verification solutions for complex Processor, Edge AI and Multimedia SoC semiconductor products including test plan development, test bench development using System Verilog/UVM, coverage, performance, and verification flows/methodologies. This position reports to the Director, ASIC Design Verification.

The typical base pay range for this position is USD $158,000 - $248,600 per year. Individual pay is determined by many factors including work location, job-related skills, experience, and relevant education or training. This position is also eligible for a discretionary annual performance bonus, equity, and other benefits. Note that compensation listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.

Responsibilities & Competencies

Job Duties

• Create verification plans from high level product requirements and Design Documents
• Technically lead full chip verification efforts including working with designer to get a deep insight on the design and develop test plan for SoC and IPs
• Build test bench in System Verilog/UVM and create test cases to ensure maximum coverage including SoC system performance profiling and system level stress tests
• Run simulation in both RTL and netlist level, debug and fix issues and create test reports.
• Develop verification IPs which can be reused at different level verification
• Co-work with FPGA engineers to prepare test vectors, support tests and debug
• Understand DV flows, scripts and tools, and actively propose new methodologies/enhancements as needed to increase verification efficiency
• Explore advanced verification methodologies, optimize the verification process/environment to improve efficiency and quality
• Support the DV manager to increase the verification quality control and sign-off the DV tasks
• Mentor developing team members in debugging and capability building for SoC verification
  
  

Competencies

• Deep knowledge in SystemVerilog, C/C and UVM
• Excellent understanding of the SoC architecture, AXI/AHB protocol
• Strong understanding of SOC verification methodologies and techniques
• Excellent debugging and analytical skills
• Proactive, self-starter, able to work independently in a fast-paced environment
• A good team player with experience in mentoring engineers
• Well organized with strong attention to detail; proactively ensures work is accurate
• Positive attitude and work ethic; unafraid to ask questions and explore new ideas
• Resourceful and able to solve complex problems through adaptation of existing technology and investigation of new technology to resolve complex problems
• Excellent communication, interpersonal and analytical skills, including the ability to communicate complex, interactive design concepts clearly
• Ability to work within and influence diverse, geographically distributed teams, with the passion to become part of cross-functional teams
  
  

Qualifications (Requirements)

• Bachelor’s degree (Masters preferred) in Electrical Engineering, Computer Science or related field or equivalent
• 12 years of experience in design verification field
• Proven track record of delivering robust IP/SoC verification solutions for complex SoC products in the semiconductor industry
• Demonstrated experience in SoC verification i.e. developing and maintaining SOC verification environment, preparing and executing test plan for state of art SOCs and final sign-off
• Experienced in full system performance testing
• Strong Programming skills in Perl, Python, Shell
• Experienced in low power verification
• No travel Required
  
  

Belief in Diversity

Synaptics is an Equal Opportunity Employer committed to workforce diversity. Qualified applicants will receive consideration without regard to race, sex, sexual orientation, gender identity, national origin, color, age, religion, protected veteran or disability status, or genetic information.