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ASIC Design Engineer Intern - 2025

SK hynix memory solutions America Inc.
San Jose, CA Intern
POSTED ON 12/29/2025
AVAILABLE BEFORE 1/29/2026
  • About the Company

At SK Hynix Memory Solution, we're at the forefront of semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers. As a global leader in DRAM and NAND flash technologies, we drive the evolution of advancing mobile technology, empowering cloud computing, and pioneering future technologies. Our cutting-edge memory technologies are essential in today's most advanced electronic devices and IT infrastructure, enabling enhanced performance and user experiences across the digital landscape.

We're looking for innovative minds to join our mission of shaping the future of technology. At SK Hynix Memory, you'll be part of a team that's pioneering breakthrough memory solutions while maintaining a strong commitment to sustainability. We're not just adapting to technological change – we're driving it, with significant investments in artificial intelligence, machine learning, and eco-friendly solutions and operational practices. As we continue to expand our market presence and push the boundaries of what's possible in semiconductor technology, we invite you to be part of our journey to creating the next generation of memory solutions that will define the future of computing.

About The Role

We are seeking a motivated and talented ASIC Design Engineer intern to join our ASIC design team. In this role, you will contribute to the design and verification for the next-generation SSD controller SoC. As an intern, you will work closely with experienced engineers to tackle real-word challenges, gain hands-on experience in the ASIC design flow, and grow your technical skill set in a collaborative environment.

Responsibilities

  • RTL design: assist in developing and coding ASIC modules using Verilog
  • Functional verification: work with the verification team to write and run tests
  • Automation and Scripting: develop and maintain scripts to automate repetitive tasks
  • Documentation and Presentation: create and update documentation for assigned tasks, and present the results to the team.

Minimum Qualifications

  • Currently pursuing a Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or a related field
  • Solid understanding of digital logic design and computer architecture
  • Familiar with a hardware description language (Verilog, VHDL)

Preferred Qualifications

  • Experiences with RTL simulation tool
  • Experiences with digital system development using FPGA
  • Familiar with scripting languages (Python)
  • Familiar with Linux OS
  • Previous internship or project experience in ASIC development

Regarding Compensation

The salary offered to a selected candidate will be tailored based on several factors, including the location, job grade, relevant knowledge, skills, and experience. We also take into account the internal equity among our current team members to ensure fairness and competitiveness.

Hourly Wage Estimation for ASIC Design Engineer Intern - 2025 in San Jose, CA
$58.00 to $67.00
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