What are the responsibilities and job description for the Sr. ASIC Design Engineer position at ScaleFlux?
We are looking for Sr. ASIC Design Engineer to join our rapidly growing ASIC design team focused on high performance data center infrastructure ASIC design and SOC development. The ideal candidate for this role shares our passion for creating innovative technologies, and thrives in a highly dynamic, fast-paced, results-driven environment. We are looking for highly talented, passionate, and versatile engineers that can create the next generation enterprise data center solutions.
Location: San Jose, California
Responsibilities:
- Develop advanced NAND memory controller with managed power and performance
- IP and/or chip level micro-architectures, implementation, and validation
- Write up micro-architecture and design document and be able to present to customers
- Develop RTL, perform synthesis, lint and CDC check
- Working with customers to trouble shooting, debug, and tune system performance
Requirements:
- M.S. Electrical Engineering or Computer Engineering with industry experience
- Proven experience of Verilog, System Verilog and C programming
- Experience of high speed memory controller is a big plus
- Must have knowledge of state-of-the-art NAND memory interface
- Knowledge of Embedded Systems and processor architecture is a plus
- Demonstrated ability to resolve customer issues and deliver timely results
- Teamwork spirit and effective communication skills