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ASIC Validation Engineer

ScaleFlux
San Jose, CA Full Time
POSTED ON 12/23/2025 CLOSED ON 1/21/2026

What are the responsibilities and job description for the ASIC Validation Engineer position at ScaleFlux?

We are looking for Validation Engineers to join our rapidly growing engineering team focused on breakthrough cloud and data center storage infrastructure solutions. This is an experienced position in a firmware development team to develop next-generation SSD storage and high-performance memory products. The ideal candidate for this role shares our passion for creating innovative technologies, and thrives in a highly dynamic, fast-paced, results-driven environment. We are looking for highly talented, passionate, and versatile engineers who has in depth knowledge and extensive experience with embedded firmware development that can create next generation enterprise data center solutions.


Responsibilities:

  • Work closely with the design team to review and understand specifications/architectures/micro-architectures
  • Design and develop cutting edge storage feature in firmware for enterprise SSD and/or memory device
  • Build and develop firmware infrastructure for functional debug and performance tuning
  • Develop and execute test cases to validate new hardware features at module level and system level
  • Validate complex hardware products from system level. If any potential hardware issues are found, you will need to initiate the debugging process and drive it to closure


Minimum Requirements:

  • MSEE graduate or BSEE with 2 years experiences on embedded firmware development
  • Proficient with C/C is required
  • Demonstrated experience of development and debugging/troubleshooting embedded systems
  • Must have strong interest in storage tech stack including PCIe, NVMe, NAND, DDR, microcontroller, etc.
  • Must be a team player with excellent communication skills and the desire to take on diverse challenges
  • Must be able to adapt well in fast-paced and high-stressed work environment


Preferred Qualifications:

  • Understanding of RISC-V, ARM, or other CPU core architecture is preferred
  • Experience with NVMe protocol and high-speed interface standard protocols (PCIe/DDR) is strongly desired
  • Experience with storage system, NAND Flash and other non-volatile storage is a big bonus point
  • Experience with Python and Shell is a plus

Salary.com Estimation for ASIC Validation Engineer in San Jose, CA
$121,292 to $136,315
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