What are the responsibilities and job description for the Senior Design Verification Engineer position at Saika Technologies Inc?
Location: Bay Area, CA OR Austin, TX (Complete onsite)
Role Description
• experience in ASIC/SoC verification with SV/UVM environments
• In-depth knowledge of verification flows
• Clear understanding of constrained random verification process, functional coverage, assertion methodology & philosophy
• Team player with excellent communication skills and the desire to take on diverse challenges
• Prior verification experience in a few of the following domains is required:
• RISC architecture
• ARM peripheral protocols (AXI, AHB, AMBA, APB, etc)
• USB2.0, USB3.0, I2C, I3C, UART, SMBUS, eMMC, NOR/NAND flash