What are the responsibilities and job description for the ASIC Design Engineer position at Reveille Technologies?
Hi ,
This role is a Full Time / Permanent .
Title: Senior ASIC / SoC Network-on-Chip Design Engineer or Senior ASIC Design Engineer
Location : Mountain View CA
Qualifications
• 8 years delivering ASIC/SoC IP designs.
• 6 years of hands-on digital design, RTL, and microarchitecture experience.
• Strong experience with Verilog/SystemVerilog, synthesis, timing constraints, CDC, Lint, and PPA trade-offs.
• Experience with NoC/interconnect and high-throughput/low-latency designs.
• Experience with SoC integration, post-silicon debug, and Python scripting.
Key Skills: ASIC | NoC | RTL | SystemVerilog | Microarchitecture | CDC | Lint | Synthesis | Timing | PPA | Python
Thanks & Regards..,
Arun Prasath
Reveille Technologies, Inc