Semiconductor R&D Program Manager (Shuttle Captain)

Position Overview

As a Semiconductor R&D Program Manager (Shuttle Captain / Shuttle Program Manager), you will manage the planning, development, and execution of R&D shuttles and testchips that are critical for advanced technology development at the 2nm and beyond nodes. You will serve as the central coordinator across R&D, design enablement, foundry operations, and ecosystem partners to ensure shuttle runs and testchip programs meet aggressive schedules, achieve learning objectives, and support technology qualification.

This role requires both strong technical expertise in semiconductor design, process technologies and robust program management skills to lead complex, multi-site projects in fast-paced environments.

Work Location

As indicated in the posting, the primary workplace for this role is expected to in Albany, New York. We also consider the possibility of hiring from Japan (Tokyo&Hokkaido) for this role.

Key Responsibilities

• Shuttle & Test chip Planning
• Define scope, objectives, and timelines for R&D shuttle runs and technology development test chips.
• Prioritize test structures, IP blocks, and PDK validation vehicles in alignment with process and device development milestones.
• Program Management
• Act as the single point of contact (“Shuttle Captain”) for all stakeholders.
• Manage schedules, resources, and risks to ensure timely shuttle tape-outs.
• Lead and chair reviews for design readiness, milestone adherence, and risk mitigation.
• Technical Contribution
• Drive integration of foundation IP, SRAM splits, reliability macros, and qualification structures.
• Ensure DRC/LVS, timing, DFT, and tape-out sign-off criteria are fully met across all participating teams and partners.
• Support debug and silicon learning from shuttle results.
• Cross-functional Collaboration
• Partner with EDA vendors and design ecosystem partners to ensure production-ready flows.
• Collaborate with reliability, yield, and device engineering teams to incorporate critical test structures.
• Risk & Quality Management
• Identify and mitigate risks in shuttle execution.
• Maintain quality standards for design data, documentation, and post-silicon reporting.

Qualifications

Minimum Requirements

• B.S, M.S or above in Electrical Engineering, Computer Engineering, or a related field.
• 8 years of experience in semiconductor design enablement, test chip programs, or related fields.
• Strong knowledge of PDK, IP, DFT, mask design, sign-off methodologies, and shuttle/tape-out flows.
• Demonstrated program management skills, with proven ability to manage complex, multi-site projects.
• Ability to thrive in fast-paced, global environments with tight schedules.
• Excellent communication skills in English.

Preferred Qualifications

• Experience managing shuttle programs or large multi-IP testchips at leading-edge foundries or IDMs.
• Hands-on experience with advanced process nodes (5nm or below).
• Familiarity with reliability qualification structures (Kelvin arrays, ESD macros, etc.).
• Knowledge of chiplet and advanced packaging technologies.
• PMI certification (e.g., PMP) or equivalent program management credential is a plus.
• Japanese language proficiency is a plus.

Why Join Us?

As Semiconductor R&D Program Manager / Shuttle Captain, you will play a mission-critical role in shaping the future of semiconductor technology at 2nm and beyond. You will be at the center of the innovation cycle, directly enabling device breakthroughs, ecosystem maturity, and silicon learning that drive technology leadership.