What are the responsibilities and job description for the Silicon Validation Engineer position at Quest Global?
Job Requirements
POSITION: Silicon Validation Engineer
Who We Are
Quest Global delivers world-class end-to-end engineering solutions by leveraging our deep industry knowledge and digital expertise. By bringing together technologies and industries, alongside the contributions of diverse individuals and their areas of expertise, we are able to solve problems better, faster. This multi-dimensional approach enables us to solve the most critical and large-scale challenges across the aerospace & defense, automotive, energy, hi-tech, healthcare, medical devices, rail and semiconductor industries.
We are looking for humble geniuses, who believe that engineering has the potential to make the impossible possible; innovators, who are not only inspired by technology and innovation, but also perpetually driven to design, develop, and test as a trusted partner for Fortune 500 customers. As a team of remarkably diverse engineers, we recognize that what we are really engineering is a brighter future for us all. If you want to contribute to meaningful work and be part of an organization that truly believes when you win, we all win, and when you fail, we all learn, then we’re eager to hear from you. The achievers and courageous challenge-crushers we seek, have the following characteristics and skills
What You Will Do
We need a candidate who has experience in MIPI protocol validation experience Kernel bring up experience.
MIPI Protocol Validation: Perform deep-dive validation of MIPI D-PHY, C-PHY, DSI-2, and CSI-2 protocols. Use protocol analyzers and oscilloscopes to verify packet structure, timing (HS/LP transitions), and signal integrity.
Cross-Platform Bring-up: Lead the initial "Power-On" and board bring-up for new hardware across diverse SoC architectures.
Linux Stack Development: Optimize Linux kernel drivers within the DRM/KMS or V4L2 frameworks.
Display & Camera Interface Management: Implement and debug DSI "Command Mode" (DBI) and "Video Mode" (DPI) operations, including complex tearing-effect (TE) synchronization. System Configuration: Design and maintain complex .dtsi and .dtbo files to manage peripheral power sequencing, resets, and high-speed clocking.
Additional Skills
Compensation decisions are made based on factors including experience, skills, education, and other job-related factors, in accordance with our internal pay structure. We also offer a comprehensive benefits package, including health insurance, paid time off, and retirement plan.
Work Requirements
This role is considered an on-site position located in San Jose, CA, USA
POSITION: Silicon Validation Engineer
Who We Are
Quest Global delivers world-class end-to-end engineering solutions by leveraging our deep industry knowledge and digital expertise. By bringing together technologies and industries, alongside the contributions of diverse individuals and their areas of expertise, we are able to solve problems better, faster. This multi-dimensional approach enables us to solve the most critical and large-scale challenges across the aerospace & defense, automotive, energy, hi-tech, healthcare, medical devices, rail and semiconductor industries.
We are looking for humble geniuses, who believe that engineering has the potential to make the impossible possible; innovators, who are not only inspired by technology and innovation, but also perpetually driven to design, develop, and test as a trusted partner for Fortune 500 customers. As a team of remarkably diverse engineers, we recognize that what we are really engineering is a brighter future for us all. If you want to contribute to meaningful work and be part of an organization that truly believes when you win, we all win, and when you fail, we all learn, then we’re eager to hear from you. The achievers and courageous challenge-crushers we seek, have the following characteristics and skills
What You Will Do
We need a candidate who has experience in MIPI protocol validation experience Kernel bring up experience.
MIPI Protocol Validation: Perform deep-dive validation of MIPI D-PHY, C-PHY, DSI-2, and CSI-2 protocols. Use protocol analyzers and oscilloscopes to verify packet structure, timing (HS/LP transitions), and signal integrity.
Cross-Platform Bring-up: Lead the initial "Power-On" and board bring-up for new hardware across diverse SoC architectures.
Linux Stack Development: Optimize Linux kernel drivers within the DRM/KMS or V4L2 frameworks.
Display & Camera Interface Management: Implement and debug DSI "Command Mode" (DBI) and "Video Mode" (DPI) operations, including complex tearing-effect (TE) synchronization. System Configuration: Design and maintain complex .dtsi and .dtbo files to manage peripheral power sequencing, resets, and high-speed clocking.
Additional Skills
- Firmware and hardware integration for new designs
- Support development, integration, testing,
- Experience in Driver or Power On Self or bootloader code for test Serial interface design verification I2C, SPI, I3C, USB3.0. MIPI
- Solid understanding of SoC boot flow, clocks, power domains, and PHYs
- Expertise in Device Tree (DTS/DTSI/DTBO)
- Software Languages: C / C
- Experience with display panels and camera sensors from multiple vendors
- Exposure to Qualcomm, MediaTek, NXP, Renesas, or TI SoCs
- Understanding of signal integrity concepts (eye diagrams, jitter, skew)
- Ability to debug both hardware and software boundary issues
Compensation decisions are made based on factors including experience, skills, education, and other job-related factors, in accordance with our internal pay structure. We also offer a comprehensive benefits package, including health insurance, paid time off, and retirement plan.
Work Requirements
This role is considered an on-site position located in San Jose, CA, USA
- You must be able to commute to and from the location with your own transportation arrangements to meet the required working hours.
- Shop floor environment, which may include but not limited to extensive walking, and ability to lift up to 40 lbs.
Salary : $120,000 - $135,000