What are the responsibilities and job description for the Senior Modeling and Verification Engineer position at PER International?
Company Overview
Our client is a design company specializing in advanced semiconductor and video processing solutions. They focus on developing high-performance SoCs and IPs that enable next-generation multimedia and communication applications. With deep expertise in video codec technologies, embedded systems, and hardware design, our client delivers innovative products that power cutting-edge devices across the consumer, automotive, and AI markets.
Position Overview
We are looking for a Senior Modeling and Verification Engineer with 5–10 years of experience (7 years ideal) to join our client’s engineering team in developing next-generation video codec technologies. The successful candidate will be responsible for building hardware models, designing verification environments, and collaborating closely with hardware and firmware teams to ensure optimal system performance and integration.
Key Responsibilities
- Develop C-models for hardware implementation of video CODECs such as HEVC, VVC, and AV2.
- Design comprehensive test plans and create both directed and random test cases to verify hardware design correctness.
- Collaborate with the hardware team on RTL implementation, verification, and validation of hardware functions.
- Work with the firmware team for firmware development, debugging, and integration.
- Utilize Linux environments for development, debugging, and scripting tasks.
Must-Have Experience
- 5–10 years of experience in modeling, verification, or related software/hardware engineering fields (7 years preferred).
- Recent knowledge and experience in software or hardware related to video CODECs.
- Expert-level proficiency in C/C programming with extensive hands-on experience.
- Strong Linux programming experience, including debugging tools and scripting languages (Shell, Perl, or Python).
- Not required to be a kernel expert but must be highly proficient using the Linux environment.
- MS in Electrical Engineering, Computer Science, or Computer Engineering, or PhD in a related field.
Nice-to-Have Experience
- Experience with SystemC.
- Experience collaborating with hardware teams for verification and validation.
- Prior verification experience, including Verilog/SystemVerilog test bench development.
- Familiarity with recent video CODEC standards such as HEVC, VVC, and AV2.
- Mandarin-speaking skills are a plus.
Interested?
Please reach out to renz@per-international.com for more details or to express interest in the role.