What are the responsibilities and job description for the High-Speed Interconnect Architect position at Neonsoft Inc?
Job Details
We are seeking a High-Speed Interconnect Architect for one of our clients in Fremont, California. This role will design and define next-generation interconnect architectures for advanced AI servers and high-performance computing (HPC) platforms. The position focuses on technologies such as high-speed backplanes (NVLINK, UALINK, EXAMAX 2), co-packaged copper, flyover cables, PCIe, CXL, OSFP, OSFP-X, and 448G/lane interconnects balancing performance, signal integrity, and manufacturability to enable scalable, high-density data solutions.
Responsibilities:
Architect and optimize high-speed interconnect solutions for AI/HPC systems.
Evaluate and integrate technologies such as NVLINK, UALINK, PCIe, and CXL.
Collaborate across hardware, packaging, and signal integrity teams.
Participate in standards bodies (OCP, PCI-SIG, UALINK, IEEE, CXL).
Document technical specifications and contribute to product roadmaps.
Qualifications:
Bachelor s or Master s in Electrical or Computer Engineering.
10 years of experience in high-speed interconnect or system design.
Expertise in high-speed protocols (PCIe, CXL, Ethernet, InfiniBand, etc.).
Strong knowledge of SI/PI, PCB design, and simulation tools.
Experience with AI or data center hardware preferred.
Salary : $180,000 - $270,000