What are the responsibilities and job description for the Custom Analog IC Layout Engineer position at Murata Electronics?
Waltham, MA, US, 02451
Eta Wireless is solving the fundamental problem of RF power amplifier power consumption in communications devices. We pioneered Digital Envelope Tracking (DET) technology and have since been acquired by Murata Manufacturing in September 2021. Eta is a multi-disciplinary, multi-national team of engineers with expertise spanning RF systems, power electronics, integrated circuits, embedded systems, software, algorithms, and module design. The breadth of expertise allows us to solve challenging problems with creative and disruptive solutions at tier-one customers.
TheCustom Analog IC Layout Engineerdesigns layouts for high-current and high-voltage transistors, regulators as well as related analog blocks. This position ensures optimal current handling, EM reliability, and thermal performance. The Custom Analog IC Layout Engineerspecializes inpower device layoutfor high-performance, high-reliability analog, and mixed-signal integrated circuits. The role is accountable for the physical layout of power transistors, pass devices, high-current drivers, regulators, and related analog circuitry, working closely with circuit designers from concept through tape-out. The ideal candidate has a deep understanding of high-voltage and high-current layout practices, electromigration limits, parasitic reduction, and thermal management in custom ICs.
- Perform custom layout ofpower transistors, high-current regulators, ESD clamps, and other power handling circuitsin CMOS, BCD, or similar processes.
- Collaborate with designers onfloor planningto optimize current paths, thermal dissipation, and area utilization.
- Apply advanced layout techniques formatching, common centroid, and guard rings, as well as wide-metal routing, and current balancing.
- Ensure compliance with foundryDRC, LVS, and ERCrequirements and address design rule issues proactively.
- Minimize parasitic resistance and capacitance in high-current paths for optimal efficiency.
- Supportparasitic extraction, electromigration verification, and thermal analysis.
- Assist inchip-level integrationand contribute to layout reviews with multidisciplinary teams.
- 3 yearsof industry experience incustom analog IC layout with a focus on power devices.
- Experience with LDMOS, wide-metal routing, guard rings, and advanced matching techniques is preferred.
- Proficiency in Cadence Virtuoso and PVS/Assura.
- Strong understanding ofpower device layout best practices which include EM, thermal impact, HV spacing, and layered interconnect routing.
- Experience with multiple technology nodes, BCD preferred; high-voltage CMOS, or analog process flows.
- Familiarity withhigh-voltage MOSFET layoutandLDMOS structures.
- Experience withDFM techniques, yield improvement, and layout automation/scripting (SKILL, Python).
- Knowledge ofpackaging technologies (solder balls, RDL, CuP) and package-level thermal/electrical constraintsfor power ICs.
- Experience with foundry release processes.
- Bachelor's degree in Electrical Engineering, EET, or equivalent.
- Comprehensive benefits package including medical, dental, and vision insurance.
- Generous Paid Time Off including paid holidays and floating holidays.
- 401(k) employer match on retirement planning.
- Hybrid working schedule for eligible positions.
- Tuition reimbursement on approved programs.
- Flexible and health spending accounts.
- Talent Development program.
Equal Opportunity/Affirmative Action Employer - M/F/Disabilities/Veterans
Nearest Major Market: Waltham
Nearest Secondary Market: Boston
pSemi Corporation supports a diverse workforce and is committed to a policy of equal employment opportunity for applicants and employees. pSemi does not discriminate on the basis of age, race, color, religion (including religious dress and grooming practices), sex/gender (including pregnancy, childbirth, or related medical conditions or breastfeeding), gender identity, gender expression, genetic information, national origin (including language use restrictions and possession of a driver’s license issued under Vehicle Code section 12801.9), ancestry, physical or mental disability, legally-protected medical condition, military or veteran status (including “protected veterans” under applicable affirmative action laws), marital status, sexual orientation, or any other basis protected by local, state or federal laws applicable to the Company. pSemi also prohibits discrimination based on the perception that an employee or applicant has any of those characteristics, or is associated with a person who has or is perceived as having any of those characteristics.