Senior System Engineer

Senior Systems Engineer

Spacecraft Test Integration | TIDES

Scottsdale, AZ

Pay Estimated: $87.87 - $92.87/Hour

U.S. Citizenship is required by Federal Law

We are hiring a Senior Systems Engineer – Spacecraft Test Integration / TIDES to serve as a senior cross-functional technical lead supporting aerospace and defense spacecraft test environments across hardware, FPGA/firmware, and software infrastructure. This role supports the Test Integration & Development Environment for Spacecraft (TIDES) organization across System Test Environment (STE) hardware, Platform Integration & Evolution (PIE) firmware, and Standard Software Infrastructure (SSI), with responsibility for spacecraft payload development, design verification, production test, sustainment, requirements traceability, automated test infrastructure, networked software deployment, technical proposals, and system integration.

The Senior Systems Engineer will help define, integrate, and mature reusable spacecraft test environments while working across Integration & Test, Manufacturing Operations, FPGA engineering, software engineering, hardware design, systems engineering, program teams, and proposal teams. The role requires broad technical judgment across rack-level test hardware, FPGA and digital interfaces, RF test equipment, test automation, lab networks, calibration, verification, requirements, cost, schedule, and technical risk.

Responsibilities:

• Lead cross-functional technical coordination across TIDES System Test Environment (STE), Platform Integration & Evolution (PIE), and Standard Software Infrastructure (SSI) scope.
• Support the architecture, design, integration, and verification of development, unit verification, production, module, power converter, NAS, and calibration test environments.
• Translate spacecraft payload and program requirements into test capabilities, measurement approaches, interface requirements, verification methods, and evidence-generation plans.
• Develop and coordinate engineering design packages, including top-level assemblies, Interface Control Documents (ICDs), cable packages, rack architectures, RF drawer concepts, FPGA/I/O drawer concepts, calibration plans, Bills of Material (BOMs), and test readiness artifacts.
• Coordinate FPGA and digital I/O requirements across test racks, payload interfaces, data capture paths, timing/reference distribution, and platform evolution plans.

Qualifications:

• U.S. Citizenship is required by Federal Law
• Security Clearance: Department of Defense TS/SCI security clearance is preferred at time of hire.
• Bachelor's degree in Systems Engineering, Electrical Engineering, Computer Engineering, Software Engineering, or a related Science, Engineering, or Mathematics field with a minimum of 8 years of relevant experience; or a Master's degree with a minimum of 6 years of relevant experience.

Preferred Qualifications:

• Experience with spacecraft payload development, integration, verification, production test, or sustainment.
• Strong knowledge of system test environments, automated test systems, RF test equipment, FPGA-based interfaces, rack-level integration, test data infrastructure, and networked laboratory environments.
• Experience translating payload requirements into stimulus, measurement, cabling, calibration, software, network configuration, and ATP evidence requirements.
• Experience configuring and sustaining test networks and laboratory infrastructure, including static IP planning, isolated instrument LANs, 10G data paths, servers/workstations, software deployment, account coordination, backup/data handling, and networked test equipment troubleshooting.
• Familiarity with LabVIEW, TestStand, Python, Git, CI/CD, Kubernetes, Docker/containerized deployment, instrument control, and networked test systems.
• Familiarity with FPGA development, high-speed digital interfaces, timing/reference distribution, JESD204B, Ethernet/10G data paths, and hardware-in-the-loop (HIL) testing.