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DFT Engineer

Mirafra Technologies
San Jose, CA Full Time
POSTED ON 7/30/2026
AVAILABLE BEFORE 10/25/2026

Requirements:

-B.Tech / M.Tech (preferred) with 8-15 years of experience in DFT

-Strong knowledge of DFT architecture, methodologies and structural debug concepts : JTAG,

IEEE1500, Scan tests debug

-Experience in handling DFT of the large multi multimillion gate multi clock domain SoCs

-Hands on experience in SCAN, ATPG and JTAG implementation at block and chip level

-Knowledge of Verilog RTL and hands on experience in using simulators and waveform

debugging tools such as VCS and Verdi

-Hands on experience in using Synopsys DFT tools like Testmax, Tetramax, DC & FC

-Experience in post silicon debug

-Knowledge of Python, , Shell scripting, Makefiles, TCL

-Excellent problem solving skills and highly self-motivated.

Salary.com Estimation for DFT Engineer in San Jose, CA
$135,554 to $160,061
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