[Summer 2026] CPU Physical Design

About the Company: MediaTek Incorporated is a global fabless semiconductor company that enables nearly 2 billion connected devices a year. We are a market leader in developing innovative systems-on-chip (SoC) for mobile device, home entertainment, connectivity and IoT products. MediaTek is the number one Wi-Fi supplier across broadband, retail routers, consumer electronics devices and gaming, and its Wi-Fi 6 chipsets are powering the latest networking equipment for faster computing experiences.

Job description

• Responsible for high performance block implementation (RTL to GDSII)
• Perform block level floorplanning, pin placement and power grid implementation
• Implement block level placement, CTS and routing
• Close the design to meet timing, power budget and area
• Run physical verification flows (DRC/LVS/EM/IR) and implement fixes to meet the requirements
• Implement ECO’s to address functional bugs, timing and physical verification violations

Required Qualifications

• Candidate MUST be currently pursuing a MS or above degree in EE/CS or related technical field(s) graduating between Dec 2026 and Dec 2027
• Knowledge in Physical Design & Static Timing Analysis
• At least 2 year work experience in physical design or static timing analysis
• Programmable skills and Machine learning experience is advantageous

Equal Opportunity Statement: MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.