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Senior Silicon Validation Engineer (High-Speed SerDes)

Marvell Technology
Santa Clara, CA Full Time
POSTED ON 7/6/2026
AVAILABLE BEFORE 8/9/2026
About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As a Hardware & Silicon Validation Engineer at Marvell, you will help deliver next generation high bandwidth connectivity technologies. The team is responsible for post silicon validation of analog and mixed signal components used in high-speed SerDes.

This role focuses on validating transceivers at the electrical level. This is a specialized and high impact area within Marvell, working with cutting edge silicon and collaborating closely with internal design teams and internal / external customers worldwide. The position offers strong opportunities for technical growth through hands on lab work, cross functional collaboration, and exposure to advanced technologies.

What You Can Expect

  • Develop, port, execute, and debug validation software and tests for IPs high‑speed SerDes.
  • Create, maintain, and enhance validation code to support new silicon features, protocols, and standards.
  • Collaborate with Design, Firmware, DSP, Hardware, Software, and Applications Engineering teams to debug complex issues and drive root‑cause analysis.
  • Define, create, and review test plans; execute validation strategies; and generate test reports for internal and external stakeholders.
  • Develop targeted tests to characterize block‑level functionality, optimize performance, and improve product robustness.
  • Contribute to continuous improvement of validation methodologies, automation, and best practices.

What We're Looking For

  • Bachelor’s degree in Computer or Electrical Engineering with 1-3 years of relevant industry experience, or Master’s/PhD with no work experience.
  • Experience in one or more of the following areas: pre‑silicon validation, post‑silicon validation, stress testing, and PVT testing.
  • Strong Python development skills for lab automation and data analysis.
  • Working knowledge of PCIe and/or Ethernet is a plus.
  • Proven debugging skills across software, firmware, and hardware boundaries.
  • Familiarity with standard lab equipment such as oscilloscopes, signal generators and logic analyzers.
  • Ability to work across disciplines and manage multiple technical priorities.
  • Strong written and verbal communication skills in English.

Expected Base Pay Range (USD)

91,760 - 137,400, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation And Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

Salary.com Estimation for Senior Silicon Validation Engineer (High-Speed SerDes) in Santa Clara, CA
$111,464 to $135,859
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