What are the responsibilities and job description for the Design Verification Intern - Bachelors Degree position at Marvell Technology?
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell Custom Solutions develops cutting-edge solutions for large AI, cloud data center, and telecom customers. The SoCs encompass best-in-class performance, advanced die-to-die and packaging technology, and optimized low-power techniques. As part of the Marvell Data Center Design Verification Team, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use highly advanced technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers’ specifications whether they’re a major hyperscaler company or telecom organization, etc.
What You Can Expect
The Design Verification Engineering Intern within the Boise Design Center will be a member of the verification team responsible for the verification of our complex SOCs. Responsibilities may include writing and executing verification plans, developing tests and running simulations, debugging failures and working with other team members to resolve issues. You will gain experience using leading edge EDA tools and methodologies as well as the opportunity to work and learn alongside some of the most talented engineers in the industry.
What We're Looking For
27 - 53, $ per hour.
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation And Benefit Elements
For Internship roles, we are proud to offer the following benefits package during the internship - medical, dental and vision coverage, perks and discount programs, wellness & mental health support including coaching and therapy, paid holidays, paid volunteer days and paid sick time. Additional compensation may be available for intern PhD candidates.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Interview Integrity
As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell Custom Solutions develops cutting-edge solutions for large AI, cloud data center, and telecom customers. The SoCs encompass best-in-class performance, advanced die-to-die and packaging technology, and optimized low-power techniques. As part of the Marvell Data Center Design Verification Team, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use highly advanced technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers’ specifications whether they’re a major hyperscaler company or telecom organization, etc.
What You Can Expect
The Design Verification Engineering Intern within the Boise Design Center will be a member of the verification team responsible for the verification of our complex SOCs. Responsibilities may include writing and executing verification plans, developing tests and running simulations, debugging failures and working with other team members to resolve issues. You will gain experience using leading edge EDA tools and methodologies as well as the opportunity to work and learn alongside some of the most talented engineers in the industry.
What We're Looking For
- Candidate MUST be currently pursuing a BS degree in Electrical/Computer Engineering
- 0-1 years of previous experience
- Familiarity with System Verilog, preferably UVM.
- Experience with scripting language such as Python or Perl
- Familiarity with EDA Verification tools.
- Good understanding of Object-Oriented Design principles.
- Good understanding of Linux O.S.
27 - 53, $ per hour.
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation And Benefit Elements
For Internship roles, we are proud to offer the following benefits package during the internship - medical, dental and vision coverage, perks and discount programs, wellness & mental health support including coaching and therapy, paid holidays, paid volunteer days and paid sick time. Additional compensation may be available for intern PhD candidates.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Interview Integrity
As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
