Demo

Analog Design Intern, MS - Summer 2027

Marvell Technology
Burlington, VT Intern
POSTED ON 9/28/2026
AVAILABLE BEFORE 11/3/2026
About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

The Central Engineering Test Chip Development team provides hardware validation for custom SRAM, logic, I/O, and security circuits across Marvell business units in advanced semiconductor technology nodes. The team designs and develops test chips, establishes laboratory infrastructures for silicon characterization and measurement collection, and partners with custom circuit design teams to conduct detailed circuit analysis that verifies silicon performance and functionality.

What You Can Expect

  • Design and verify test chip experiments using Verilog simulation.
  • Develop, generate, simulate, and debug Verilog-based test patterns for hardware validation of test chip experiments.
  • Develop and maintain laboratory environments that support hardware debug, diagnostics, characterization, and measurement data collection.
  • Create software tools and automation scripts (Perl, Python, and Tcl) for design support, hardware characterization, laboratory measurements, data processing, and results analysis.
  • Analyze, summarize, document, and present characterization and validation results to engineering teams and stakeholders.

What We're Looking For

  • Currently enrolled in a Master’s Degree in MSEE, MSCE, or a related field with an expected graduation date of Fall 2027 – Summer 2028.
  • Strong understanding of digital logic circuits, memory architectures, I/O circuits, and semiconductor device physics.
  • Proven experience in design and development, supported by excellent verbal and written communication skills.
  • Proficiency in Linux/Unix environments, with strong programming and scripting skills in Perl and Python.
  • Demonstrated ability to work effectively in cross-functional, multidisciplinary teams to solve complex technical challenges.

Expected Base Pay Range (USD)

38 - 76, $ per hour.

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation And Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights for our interns: medical, dental, and vision coverage, perks and discounts, robust mental health resources to prioritize emotional well-being, and paid holidays. Additional compensation may be available for intern PhD candidates. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

Hourly Wage Estimation for Analog Design Intern, MS - Summer 2027 in Burlington, VT
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