What are the responsibilities and job description for the Senior Staff Silicon Validation Engineer position at Marvell Semiconductor, Inc.?
About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
As a Hardware and Silicon Validation Senior Staff Engineer at Marvell, you'll be helping to deliver high bandwidth over long distances. This team performs analog validations on amplifiers that drive optical electronic devices and receivers. We also validate silicon photonics, do upper electronic measurements and support the coherent digital signal programming unit. This is a niche area at Marvell, working with cutting edge technologies used by many internal and external customers around the world.What You Can Expect
- Complete responsibility of PCIe PHY Validation in post-silicon environment. Defining, documenting, executing, and reporting the overall PHY validation/test plan for Marvell storage devices.
- Lab-based silicon bring-up and unit test execution focused on PCIe Physical and PCS layer hardware and firmware functionality, while also extending to the protocol layer of the PCIe stack.
- Perform high speed signal validation and analysis using various test equipment to measure Eye diagram/Jitter/BER. Analyze and debug issues on PHY protocol of storage interface (SATA, SAS, PCIe, Ethernet).
- Troubleshoot failing tests with diagnostics, software tools, hardware analyzers, oscilloscopes, meters, logic/protocol analyzers. Leading collaborative technical discussions to drive resolution on technical issues.
- Work with cross-functional teams and external vendors to debug any post-silicon and/or customer issues related to PCIe PHY. Work closely with customers to address design issue and debug failure cases.
What We're Looking For
- Bachelor's degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience.
- Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience.
- Strong understanding of high-speed SERDES, equalization technique and PCIe protocols.
- 3-10 years experience with High Speed IO testing, debugging and validation.
- Strong lab skills with hands on experience, in system bring up, system testing and debug.
- In-depth working knowledge of test equipment used for SERDES characterization (Scope, BERT, Network analyzer, etc.).
- Strong analytical, problem-solving and communication skills.
Preferred:
- Working knowledge of PCIe interface and characterization. Working knowledge and experience on Ethernet and/or SAS/SATA SERDES is a definite plus.
- Extensive knowledge of the physical and protocol levels (PIPE I/F, PCS, MAC) of one or more common high-speed interfaces is an asset.
- Working knowledge of board design; ability to read board schematics and board layout.
- Knowledge in SERDES modeling techniques.
- Working experience with Perl or Python.
Expected Base Pay Range (USD)
121,400 - 181,800, $ per annumThe successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Interview Integrity
As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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