What are the responsibilities and job description for the Principal Engineer - Silicon Validation Engineer position at Marvell Semiconductor, Inc.?
About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
The Marvell Validation group designs and develops pre- and post-silicon test platforms to validate multi-core ARM-based network and storage processors used in communication infrastructure, data center applications, and cloud storage and computing platforms.Within the Validation group, the electrical characterization team is responsible for debugging and characterizing SerDes, DDR, and NAND flash PHY interfaces. The SerDes interfaces utilize NRZ and PAM4 signaling for Ethernet, CPRI, JESD, and PCIe, DRAM interfaces include LPDDR5 and DDR4/5 memory modules. Additionally, the characterization team develops test platforms and automated test suites to assess analog interfaces across process, voltage, and temperature (PVT) extremes, ensuring silicon viability for volume production.
What You Can Expect
Develop and maintain embedded firmware and software drivers to control and validate high-speed ASIC SoCs across various product lines using custom evaluation systems under pre-silicon emulation platforms like FPGA/Zebu and post-silicon environments.
Create and maintain kernel and user space drivers under Linux tailored to Marvell's controllers and high-speed I/O interfaces supporting Ethernet MAC/Phy, PCIe, NVMe, CXL protocols, and low-speed I/O interfaces such as I2C, I3C, SMBus, SPI, etc.
Understand the I/O stack from host to device, including both hardware and software components.
Develop and maintain host-side test application software under Linux OS.
Conduct experiments and data collection on the bench, producing professional reports that detail experimental results.
Collaborate with design and architecture teams to produce application notes, reference firmware, software libraries, and other technical documentation for new and existing SoC features.
Working knowledge of high-speed Ethernet MAC/phy subsystems interface and characterization. Extensive knowledge of the physical and protocol levels (PIPE I/F, PCS, MAC) of one or more common high-speed interfaces is an asset.
Analyze and visualize data using Excel and Python.
Excellent troubleshooting skills to resolve silicon issues and provide technical/debug support to customers.
What We're Looking For
Bachelor's degree in Computer Science, Electrical Engineering, or related fields and 10 years of related professional experience OR Master's degree and/or PhD in Computer Science, Electrical Engineering, or related fields with 5 years of work experience.
Experience with assembly language for low-level programming and proficiency in C/C for embedded systems.
In-depth knowledge of Ethernet MAC and PHY layers. Understanding of IEEE 802.3 standards.
Knowledge of SPI, I2C, UART, and other hardware communication protocols.
Proficiency in using lab equipment like oscilloscopes, logic analyzers, and spectrum analyzers.
Skills in pre-silicon validation (emulation platform) and post-silicon bring-up.
Ability to work closely with cross-functional teams, including hardware engineers, software developers, and product managers.
Familiarity with ARM CPUs (multicore/cluster) and their internals.
Experience with low-level hardware interfaces and bare-metal software development
Knowledge of at least one protocol specification like NVMe, PCIe, CXL or Nand Flash (JEDEC Spec) will be a Plus
Experience in Linux user space I/O driver development and debugging using the SPDK/DPDK stack will be a Plus
Proficiency in Excel and Python programming will be a Plus.
Expected Base Pay Range (USD)
143,200 - 214,500, $ per annumThe successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
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