Demo

ASIC Design Engineer

Lensa
Sunnyvale, CA Full Time
POSTED ON 12/2/2025 CLOSED ON 12/26/2025

What are the responsibilities and job description for the ASIC Design Engineer position at Lensa?

Lensa is a career site that helps job seekers find great jobs in the US. We are not a staffing firm or agency. Lensa does not hire directly for these jobs, but promotes jobs on LinkedIn on behalf of its direct clients, recruitment ad agencies, and marketing partners. Lensa partners with DirectEmployers to promote this job for META. Clicking "Apply Now" or "Read more" on Lensa redirects you to the job board/employer site. Any information collected there is subject to their terms and privacy notice.

Summary

Meta Platforms, Inc. (Meta), formerly known as Facebook Inc., builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps and services like Messenger, Instagram, and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. To apply, click "Apply to Job" online on this web page.

Required Skills

ASIC Design Engineer Responsibilities:

  • Responsible for micro-architecture development.
  • Perform RTL development using Verilog, System Verilog and/or HLS.
  • Responsible for Lint, CDC, Synthesis, & Power Optimization.
  • Collaborate with verification and emulation teams in test planning, development, and debugging.
  • Collaborate with implementation team to close the design on timing and power.

Minimum Qualifications

Minimum Qualifications:

  • Requires a Bachelor's degree (or foreign degree equivalent) in Computer Science, Computer Engineering, or a related field and 3 years of experience in the job-offered or in a related occupation
  • Requires 3 years of experience in the following:
  • Verilog or System Verilog
  • Micro-architecture and RTL development for complex control and data path IPs
  • Experience in SoC Micro-architecture, Design and Integration
  • Experience in CPU, NOC, Memory, Peripheral Subsystems or Video Codec designs
  • Synthesis, Timing Closure or Formal Verification Methodology
  • TCL, Python, Perl, or Shell-scripting
  • Working with complex control and data path IPs

Public Compensation

$208,936/year to $234,520/year bonus equity benefits

Industry: Internet

Equal Opportunity

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@fb.com.

If you have questions about this posting, please contact support@lensa.com

Salary : $208,936 - $234,520

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