FPGA Engineer

Description

Looking for an opportunity to make an impact?

At Leidos, we deliver innovative solutions through the efforts of our diverse and talented people who are dedicated to our customers’ success. We empower our teams, contribute to our communities, and operate sustainably. Everything we do is built on a commitment to do the right thing for our customers, our people, and our community. Our Mission, Vision, and Values guide the way we do business.

Are you ready for your next career challenge?

Leidos Defense provides a diverse portfolio of systems, solutions, and services covering land, sea, air, space, and cyberspace for customers worldwide. Solutions for Defense include enterprise and mission IT, large-scale intelligence systems, command and control, geospatial and data analytics, cybersecurity, logistics, training, and intelligence analysis and operations support. Our team is solving the world’s toughest security challenges for customers with “can’t fail” missions.

Leidos Defense Space Business Area is seeking a FPGA Engineer to join our team in San Diego, CA. This is an exciting opportunity to leverage your expertise in successfully deploying complex engineering projects, while contributing to our national defense mission.

We are looking for engineers who thrive in fast-paced environments and have a passion for developing and delivering high-tech solutions. Experience in space qualified designs for LEO, MEO, and GEO will be a plus and we value and welcome those with experience working for organizations like SDA, RCO, or DARPA. Emphasis is on complete life-cycle development of complex FPGAs starting with architecture, design, implementation, timing closure, and hardware testing.

Primary Responsibilities

• Develop and test FPGA designs for Chemical, Biological, Radiation, Nuclear, and Space sensor systems for federal government customers.
• Develop and execute FPGA test plans, determine root cause of test failures, and iterate with senior staff to determine design changes to improve FPGA performance.
• Support electrical engineering activities including FPGA designs and system integration and testing with CAD and lab activities.
• Collaborate with a multi-disciplined design team to design and integrate DSP applications for latest System on a Chip (SoC) implementations such as Xilinx Zynq Ultrascale and Xilinx RFSoC.
• Analyze, design, and implement HDL test benches in hardware description languages, HDL (VHDL, Verilog), for code validation and validation against models.
• Able to synthesize, place and route, meeting timing requirements from high-speed FPGAs
• Analyze, design, simulate, and implement designs which interface to common signaling standards, typical IP hard macros such as SERDES, PLLS, etc. and/or protocols such PCIe, 10GBE Ethernet, LVDS, etc.
• Use judgment to perform technical troubleshooting and diagnosis of failed equipment and support root cause analysis.
• Perform data analysis and write technical reports.
• Develop and maintain design documents, functional requirements and interface control documents
  
  

Basic Qualifications

BS and 5 years of relevant experience as an electrical engineer or computer engineer in an R&D environment or Masters with 3 year of relevant experience.

Experience or coursework related to testing FPGA or CPLD designs in an electronics lab.

Fluent in Vivado, Modelsim or Riviera. Fluent in testbenches and self-checking verification methods.

Working knowledge of electronics test equipment like function generators, oscilloscopes, logic analyzers, and lab power supplies.

Well-organized, reliable, attention to detail, demonstrated personal initiative. Ability to multi-task and prioritize workload. Good interpersonal skills and ability to coordinate work with others. Good oral and written communication skills.

Experience working with cross-functional R&D development teams.

Motivated self-starter able to work under minimal supervision and an entrepreneurial approach to roles and responsibilities.

US Citizenship is required and must be able to obtain/maintain a Top Secret Security Clearance.

Familiarity with GIT, JIRA, Agile, Scrum

<20% travel to customer sites as required.

Preferred Qualifications

• Masters’ degree or higher in Electrical/Computer Engineering with emphasis on digital/ASIC/FPGA design is a plus.
• Breadth of experience in a complementary discipline ability to develop image processing algorithms in Matlab and implement them in HDL, FPGA design, or embedded software is a plus.
• Experience with Microchip Polarfire and Libero tools is a plus.
• Experience reviewing and documenting technical data packages for military products.
• Demonstrated mid-level lead position in a large FPGA project
• Active Clearance
  
  

If you're looking for comfort, keep scrolling. At Leidos, we outthink, outbuild, and outpace the status quo — because the mission demands it. We're not hiring followers. We're recruiting the ones who disrupt, provoke, and refuse to fail. Step 10 is ancient history. We're already at step 30 — and moving faster than anyone else dares.

Original Posting

April 27, 2026

For U.S. Positions: While subject to change based on business needs, Leidos reasonably anticipates that this job requisition will remain open for at least 3 days with an anticipated close date of no earlier than 3 days after the original posting date as listed above.

Pay Range

Pay Range $87,100.00 - $157,450.00

The Leidos pay range for this job level is a general guideline onlyand not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.

About Leidos

Leidos is an industry and technology leader serving government and commercial customers with smarter, more efficient digital and mission innovations. Headquartered in Reston, Virginia, with 47,000 global employees, Leidos reported annual revenues of approximately $16.7 billion for the fiscal year ended January 3, 2025. For more information, visit www.Leidos.com.

Pay And Benefits

Pay and benefits are fundamental to any career decision. That's why we craft compensation packages that reflect the importance of the work we do for our customers. Employment benefits include competitive compensation, Health and Wellness programs, Income Protection, Paid Leave and Retirement. More details are available at www.leidos.com/careers/pay-benefits.

Securing Your Data

Beware of fake employment opportunities using Leidos’ name. Leidos will never ask you to provide payment-related information during any part of the employment application process (i.e., ask you for money), nor will Leidos ever advance money as part of the hiring process (i.e., send you a check or money order before doing any work). Further, Leidos will only communicate with you through emails that are generated by the Leidos.com automated system – never from free commercial services (e.g., Gmail, Yahoo, Hotmail) or via WhatsApp, Telegram, etc. If you received an email purporting to be from Leidos that asks for payment-related information or any other personal information (e.g., about you or your previous employer), and you are concerned about its legitimacy, please make us aware immediately by emailing us at LeidosCareersFraud@leidos.com.

If you believe you are the victim of a scam, contact your local law enforcement and report the incident to the U.S. Federal Trade Commission.

Commitment to Non-Discrimination

All qualified applicants will receive consideration for employment without regard to sex, race, ethnicity, age, national origin, citizenship, religion, physical or mental disability, medical condition, genetic information, pregnancy, family structure, marital status, ancestry, domestic partner status, sexual orientation, gender identity or expression, veteran or military status, or any other basis prohibited by law. Leidos will also consider for employment qualified applicants with criminal histories consistent with relevant laws.