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FPGA Design/Verification Engineer

LanceSoft
Owego, NY Temporary
POSTED ON 10/12/2026
AVAILABLE BEFORE 11/11/2026
Job Title: FPGA Design/Verification Engineer Job Location: Owego, NY 13827 Duration: 12 Months (Possible for extension) Pay rate range: $60 –$80 /hr on W2 (All inclusive)   Job Description: The selected candidate will be responsible for ASIC & FPGA development on R&D program. This engineer with have experience in developing, testing, and integrating digital signal processing (DSP), high speed digital design, high speed communication and system-on-chip (SOC) implemented on FPGA platforms. Experience with COTS based control platforms and embedded processors on FPGA platforms. This person will help develop more affordable ways to automate and develop scripts to improve FPGA development efforts. Cross discipline collaboration with Systems Architects, RF/Analog & Digital Circuit designers and ASIC/FPGA engineers to create leading edge products for future business growth, contributing to complex systems employing high speed networking concepts. The selected candidate will also provide support and technical direction to junior engineers. Overall contribution to design, simulation, verification, integration & test of complex, high speed products. Required Skills: Experience with FPGA design tools (Xilinx Vivado, Intel Quartus, Synopsys Synplify). Proficient in SystemVerilog Proficiency with HDL simulators, waveform viewers, and coverage tools. Familiarity with hardware in the loop (HIL) test setups and test equipment (e.G., JTAG, logic analyzers). Experience with version control systems and configuration management. Desired Skills: Proficient in UVM. Proficient in C.

Salary : $60 - $80

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