What are the responsibilities and job description for the Sr. Digital Design Engineer position at Jobs via Dice?
This Jobot Job is hosted by: Christina Finster
Are you a fit? Easy Apply now by clicking the "Apply Now" button and sending us your resume.
Salary: $180,000 - $180,000 per year
A bit about us:
Our Series B client is building a Global Bluetooth network dedicated to machine-to-machine connectivity. They differentiate themselves as the first modem-less and gateway-less, direct-to-satellite network from off-the-shelf BLE chips.
Why join us?
Compensation & Benefits
Salary: $150K - $180K/year (commensurate with experience)
Comprehensive Benefits - Health, Dental, Vision, & HSA options
Unlimited PTO - Take the time you need to recharge
Parental Leave - Paid time off to welcome a new child
Commuter Benefits - If working from HQ
Learning & Development Allowance - Invest in your growth
Health & Wellness Stipend - Support for your physical and mental well-being
Sabbatical Program - Recharge and explore new ideas after five years
Cutting-Edge Space Tech - Work on state-of-the-art satellite systems
Additional Perks - Team retreats, swag, and more
Job Details
As a Senior Digital Design Engineer, you will play a key role in developing the system architecture and RTL codebase for the FPGA module that performs localization and decodes packets from decoding from ground-based BLE device transmissions. You'll collaborate closely with a cross-functional team of system, hardware, and software engineers to optimize the throughput, accuracy, power efficiency, and reliability of the Hubble satellite constellation.
This is a full-time position based in Seattle, WA.
AN IDEAL CANDIDATE HAS
A Sense of Urgency: Lead projects from concept to reality, rapidly and effectively
First Principles Engineering: Have a strong understanding of the whys behind the whats; have the ability to extrapolate from first principles to complex system design
High Learning Agility: Love to learn; have a grounded approach to recognizing your weaknesses and take the initiative to brush up on and sharpen your engineering foundations to better collaborate with your teammates with different backgrounds
System-Level Design and Analysis: Understand the requirements flow down process and be able to quickly iterate on evolving requirements
Excellent Communication Skills: Effectively convey ideas and communicate technical topics with engineering, build team, and operations; run self-directed design reviews and participate in reviews of parallel systems
Anticipation of Needs: Identify problems, think creatively, and rapidly produce reliable and cost-effective solutions to meet the ever growing and changing needs of an early-stage company
Basic Qualifications
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
5 years of experience in FPGA-based digital design, with a strong emphasis on real-time signal processing and communication systems.
Proven expertise in RTL design (Verilog/SystemVerilog) for high-throughput, low-latency digital receivers.
Experience with high-speed memory interfaces, particularly DDR/DDR3/DDR4, including controller integration, timing constraints, and performance tuning.
Proficient in integrating and validating high-speed serial interfaces such as LVDS, SPI, I2C, UART, and SERDES-based links (e.g., JESD204, PCIe, Ethernet).
Skilled in FPGA synthesis, timing closure, and resource optimization on platforms such as Xilinx or Intel/Altera.
Proficiency with simulation and verification tools (e.g., ModelSim, Questa, Vivado, VUnit) and scripting languages (Python, Tcl).
Deep understanding of digital signal processing (DSP) principles, including filtering, correlation, decimation, and fixed-point arithmetic.
Experience developing packet decoders for wireless communication protocols (e.g., BLE, ZigBee, LoRa, custom PHYs).
Ability to work closely with RF engineers, firmware developers, and systems engineers to integrate and validate end-to-end communication chains.
Demonstrated ability to work in a highly cross-functional role.
Ability to work independently.
Strong interpersonal, verbal and written communication skills is a must.
Ability and willingness to thrive in a fast-paced, rapidly changing work environment.
Passion for creating state-of-the-art hardware systems.
STRONGLY DESIRED
Experience designing distributed digital signal processing systems across multiple FPGAs or compute nodes.
Familiarity with soft-core or hard-core processor integration (e.g., ARM) and peripheral interfacing (SPI, I2C, AXI).
Embedded linux (Petalinux) experience.
Familiarity with synchronization techniques (e.g., preamble detection, symbol timing recovery, frequency offset correction).
Experience working with lab tools such as oscilloscopes, logic analyzers, and RF test equipment for bring-up and debugging.
Knowledge of low-power design techniques for space-based or resource-constrained systems.
Familiarity with BLE physical layer characteristics or similar short-range RF communication standards.
Interested in hearing more? Easy Apply now by clicking the "Apply Now" button.
Jobot is an Equal Opportunity Employer. We provide an inclusive work environment that celebrates diversity and all qualified candidates receive consideration for employment without regard to race, color, sex, sexual orientation, gender identity, religion, national origin, age (40 and over), disability, military status, genetic information or any other basis protected by applicable federal, state, or local laws. Jobot also prohibits harassment of applicants or employees based on any of these protected categories. It is Jobot's policy to comply with all applicable federal, state and local laws respecting consideration of unemployment status in making hiring decisions.
Sometimes Jobot is required to perform background checks with your authorization. Jobot will consider qualified candidates with criminal histories in a manner consistent with any applicable federal, state, or local law regarding criminal backgrounds, including but not limited to the Los Angeles Fair Chance Initiative for Hiring and the San Francisco Fair Chance Ordinance.
Information collected and processed as part of your Jobot candidate profile, and any job applications, resumes, or other information you choose to submit is subject to Jobot's Privacy Policy, as well as the Jobot California Worker Privacy Notice and Jobot Notice Regarding Automated Employment Decision Tools which are available at jobot.com/legal.
By applying for this job, you agree to receive calls, AI-generated calls, text messages, or emails from Jobot, and/or its agents and contracted partners. Frequency varies for text messages. Message and data rates may apply. Carriers are not liable for delayed or undelivered messages. You can reply STOP to cancel and HELP for help. You can access our privacy policy here: jobot.com/privacy-policy
Are you a fit? Easy Apply now by clicking the "Apply Now" button and sending us your resume.
Salary: $180,000 - $180,000 per year
A bit about us:
Our Series B client is building a Global Bluetooth network dedicated to machine-to-machine connectivity. They differentiate themselves as the first modem-less and gateway-less, direct-to-satellite network from off-the-shelf BLE chips.
Why join us?
Compensation & Benefits
Salary: $150K - $180K/year (commensurate with experience)
Comprehensive Benefits - Health, Dental, Vision, & HSA options
Unlimited PTO - Take the time you need to recharge
Parental Leave - Paid time off to welcome a new child
Commuter Benefits - If working from HQ
Learning & Development Allowance - Invest in your growth
Health & Wellness Stipend - Support for your physical and mental well-being
Sabbatical Program - Recharge and explore new ideas after five years
Cutting-Edge Space Tech - Work on state-of-the-art satellite systems
Additional Perks - Team retreats, swag, and more
Job Details
As a Senior Digital Design Engineer, you will play a key role in developing the system architecture and RTL codebase for the FPGA module that performs localization and decodes packets from decoding from ground-based BLE device transmissions. You'll collaborate closely with a cross-functional team of system, hardware, and software engineers to optimize the throughput, accuracy, power efficiency, and reliability of the Hubble satellite constellation.
This is a full-time position based in Seattle, WA.
AN IDEAL CANDIDATE HAS
A Sense of Urgency: Lead projects from concept to reality, rapidly and effectively
First Principles Engineering: Have a strong understanding of the whys behind the whats; have the ability to extrapolate from first principles to complex system design
High Learning Agility: Love to learn; have a grounded approach to recognizing your weaknesses and take the initiative to brush up on and sharpen your engineering foundations to better collaborate with your teammates with different backgrounds
System-Level Design and Analysis: Understand the requirements flow down process and be able to quickly iterate on evolving requirements
Excellent Communication Skills: Effectively convey ideas and communicate technical topics with engineering, build team, and operations; run self-directed design reviews and participate in reviews of parallel systems
Anticipation of Needs: Identify problems, think creatively, and rapidly produce reliable and cost-effective solutions to meet the ever growing and changing needs of an early-stage company
Basic Qualifications
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
5 years of experience in FPGA-based digital design, with a strong emphasis on real-time signal processing and communication systems.
Proven expertise in RTL design (Verilog/SystemVerilog) for high-throughput, low-latency digital receivers.
Experience with high-speed memory interfaces, particularly DDR/DDR3/DDR4, including controller integration, timing constraints, and performance tuning.
Proficient in integrating and validating high-speed serial interfaces such as LVDS, SPI, I2C, UART, and SERDES-based links (e.g., JESD204, PCIe, Ethernet).
Skilled in FPGA synthesis, timing closure, and resource optimization on platforms such as Xilinx or Intel/Altera.
Proficiency with simulation and verification tools (e.g., ModelSim, Questa, Vivado, VUnit) and scripting languages (Python, Tcl).
Deep understanding of digital signal processing (DSP) principles, including filtering, correlation, decimation, and fixed-point arithmetic.
Experience developing packet decoders for wireless communication protocols (e.g., BLE, ZigBee, LoRa, custom PHYs).
Ability to work closely with RF engineers, firmware developers, and systems engineers to integrate and validate end-to-end communication chains.
Demonstrated ability to work in a highly cross-functional role.
Ability to work independently.
Strong interpersonal, verbal and written communication skills is a must.
Ability and willingness to thrive in a fast-paced, rapidly changing work environment.
Passion for creating state-of-the-art hardware systems.
STRONGLY DESIRED
Experience designing distributed digital signal processing systems across multiple FPGAs or compute nodes.
Familiarity with soft-core or hard-core processor integration (e.g., ARM) and peripheral interfacing (SPI, I2C, AXI).
Embedded linux (Petalinux) experience.
Familiarity with synchronization techniques (e.g., preamble detection, symbol timing recovery, frequency offset correction).
Experience working with lab tools such as oscilloscopes, logic analyzers, and RF test equipment for bring-up and debugging.
Knowledge of low-power design techniques for space-based or resource-constrained systems.
Familiarity with BLE physical layer characteristics or similar short-range RF communication standards.
Interested in hearing more? Easy Apply now by clicking the "Apply Now" button.
Jobot is an Equal Opportunity Employer. We provide an inclusive work environment that celebrates diversity and all qualified candidates receive consideration for employment without regard to race, color, sex, sexual orientation, gender identity, religion, national origin, age (40 and over), disability, military status, genetic information or any other basis protected by applicable federal, state, or local laws. Jobot also prohibits harassment of applicants or employees based on any of these protected categories. It is Jobot's policy to comply with all applicable federal, state and local laws respecting consideration of unemployment status in making hiring decisions.
Sometimes Jobot is required to perform background checks with your authorization. Jobot will consider qualified candidates with criminal histories in a manner consistent with any applicable federal, state, or local law regarding criminal backgrounds, including but not limited to the Los Angeles Fair Chance Initiative for Hiring and the San Francisco Fair Chance Ordinance.
Information collected and processed as part of your Jobot candidate profile, and any job applications, resumes, or other information you choose to submit is subject to Jobot's Privacy Policy, as well as the Jobot California Worker Privacy Notice and Jobot Notice Regarding Automated Employment Decision Tools which are available at jobot.com/legal.
By applying for this job, you agree to receive calls, AI-generated calls, text messages, or emails from Jobot, and/or its agents and contracted partners. Frequency varies for text messages. Message and data rates may apply. Carriers are not liable for delayed or undelivered messages. You can reply STOP to cancel and HELP for help. You can access our privacy policy here: jobot.com/privacy-policy
Salary : $150,000 - $180,000
