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DFT DV Engineer

Jobs via Dice
Santa Clara, CA Full Time
POSTED ON 4/23/2026
AVAILABLE BEFORE 5/22/2026
Dice is the leading career destination for tech experts at every stage of their careers. Our client, Peritus Inc., is seeking the following. Apply via Dice today!

Required Skill:

  • 5 to 8 years of Hardware verification experience
  • Have experience building agents, scoreboards and transactors from scratch
  • Good knowledge of high performance microprocessor architecture
  • Understanding of verification methodology

Required Skills:

  • 4 to 6 years of experience
  • Experience in Scan insertion with compression for Stuck-At and At-Speed test.
  • Experience in Scan ATPG (Stuck-At and At-Speed), coverage analysis, simulation and debug
  • Experience in MBIST insertion, simulation and debug on RTL and gates netlist
  • Experience in Boundary Scan insertion, simulation and verification.
  • Hands on knowledge in state-of-the-art EDA tools for DFT, design and verification.(Mentor, Cadence, Synopsys)
  • Good written and verbal communication skills in English
  • STA DFT Test mode timing constraint development and analysis is a plus
  • Knowledge of Verilog HDL and experience with simulators and waveform debugging tools
  • Experience with ATE silicon debug and utilize scripting with perl/Tcl for efficient handling of ATE data a plus.

Salary.com Estimation for DFT DV Engineer in Santa Clara, CA
$114,571 to $145,117
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