What are the responsibilities and job description for the SoC Analog Engineer position at Intel?
Job Details
Job Description:
The Role and Impact As an Analog Circuit Design Engineer, you will play a pivotal role in shaping Intel's cutting-edge analog and mixed-signal design efforts. Your contributions will drive advancements in high-performance and low-power circuits for next-generation products, ensuring optimal functionality, robustness, and electrical capabilities. Working on advanced CMOS processes, you will collaborate across architecture, design, and layout teams to develop industry-leading solutions that power Intel's innovative technology roadmap. This is an exciting opportunity to apply your expertise and creativity to tackle critical challenges in analog design, optimizing circuits for power, performance, area, timing, and yield. Key Responsibilities - Design, develop, and build analog circuits in advanced CMOS process nodes. - Create floorplans, perform circuit design, extract chip parameters, and simulate analog behavior models. - Develop and execute test plans to verify designs against circuit and block microarchitecture specifications. - Evaluate test results, verify functionality, and optimize circuits for power, performance, area, timing, and yield goals. - Collaborate cross-functionally to report design progress and address performance or circuit design issues. - Minimize leakage, optimize power consumption, and enhance the area efficiency of analog/mixed-signal blocks. - Work closely with architecture and layout teams to ensure robust functionality and electrical capabilities.
Qualifications
Minimum Qualifications - Bachelor's degree in Electrical Engineering, Computer Engineering, or a STEM-related field. - 4 years of experience with analog circuit design using advanced CMOS processes. - Proficiency in design implementation and methodology for custom/analog mixed-signal design and layout. - Hands-on experience with analog tools and workflows, including schematic entry, analog simulation, extraction, and post-layout simulation. Preferred Qualifications - Master's or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a STEM-related discipline. - Experience designing analog/mixed-signal blocks such as low-noise amplifiers, filters, mixers, LVRs, LDOs, VCOs, ADC/DACs. - Skilled in layout migration between advanced FINFET technology nodes. - In-depth knowledge of reliability validation and custom layout for analog blocks. Join us in shaping tomorrow's technology today. Apply now to be part of a team that redefines innovation in analog design.
Job Type
Experienced Hire
Shift
Shift 1 (United States of America)
Primary Location:
US, Oregon, Hillsboro
Additional Locations:
Business Group
Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $164,470.00 - 232,190.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Job Description:
The Role and Impact As an Analog Circuit Design Engineer, you will play a pivotal role in shaping Intel's cutting-edge analog and mixed-signal design efforts. Your contributions will drive advancements in high-performance and low-power circuits for next-generation products, ensuring optimal functionality, robustness, and electrical capabilities. Working on advanced CMOS processes, you will collaborate across architecture, design, and layout teams to develop industry-leading solutions that power Intel's innovative technology roadmap. This is an exciting opportunity to apply your expertise and creativity to tackle critical challenges in analog design, optimizing circuits for power, performance, area, timing, and yield. Key Responsibilities - Design, develop, and build analog circuits in advanced CMOS process nodes. - Create floorplans, perform circuit design, extract chip parameters, and simulate analog behavior models. - Develop and execute test plans to verify designs against circuit and block microarchitecture specifications. - Evaluate test results, verify functionality, and optimize circuits for power, performance, area, timing, and yield goals. - Collaborate cross-functionally to report design progress and address performance or circuit design issues. - Minimize leakage, optimize power consumption, and enhance the area efficiency of analog/mixed-signal blocks. - Work closely with architecture and layout teams to ensure robust functionality and electrical capabilities.
Qualifications
Minimum Qualifications - Bachelor's degree in Electrical Engineering, Computer Engineering, or a STEM-related field. - 4 years of experience with analog circuit design using advanced CMOS processes. - Proficiency in design implementation and methodology for custom/analog mixed-signal design and layout. - Hands-on experience with analog tools and workflows, including schematic entry, analog simulation, extraction, and post-layout simulation. Preferred Qualifications - Master's or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a STEM-related discipline. - Experience designing analog/mixed-signal blocks such as low-noise amplifiers, filters, mixers, LVRs, LDOs, VCOs, ADC/DACs. - Skilled in layout migration between advanced FINFET technology nodes. - In-depth knowledge of reliability validation and custom layout for analog blocks. Join us in shaping tomorrow's technology today. Apply now to be part of a team that redefines innovation in analog design.
Job Type
Experienced Hire
Shift
Shift 1 (United States of America)
Primary Location:
US, Oregon, Hillsboro
Additional Locations:
Business Group
Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $164,470.00 - 232,190.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Salary : $164,470 - $232,190