What are the responsibilities and job description for the CAD Engineer for CPU Logic Design and Validation position at Intel?
Job Details
Job Description:
The Role and Impact
Join Intel as a Logic Design Methodology Engineer and be at the forefront of innovation in semiconductor technology. In this role, you will conceptualize, document, and design tools, flows, and methods (TFM) that drive efficient logic and RTL design for IPs and SoCs. Your contributions will directly impact power, performance, and area optimization for designs on cutting-edge architectures and process technology nodes, enhancing Intel's ability to deliver world-class solutions. With a focus on bridging gaps and driving transformative changes, you will collaborate closely with logic design teams, enabling fast design convergence and seamless integration to maintain Intel's leadership in the industry.
Key Responsibilities
Minimum Qualifications
Job Type
Experienced Hire
Shift
Shift 1 (United States of America)
Primary Location:
US, Texas, Austin
Additional Locations:
Business Group
Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $122,440.00 - 172,860.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Job Description:
The Role and Impact
Join Intel as a Logic Design Methodology Engineer and be at the forefront of innovation in semiconductor technology. In this role, you will conceptualize, document, and design tools, flows, and methods (TFM) that drive efficient logic and RTL design for IPs and SoCs. Your contributions will directly impact power, performance, and area optimization for designs on cutting-edge architectures and process technology nodes, enhancing Intel's ability to deliver world-class solutions. With a focus on bridging gaps and driving transformative changes, you will collaborate closely with logic design teams, enabling fast design convergence and seamless integration to maintain Intel's leadership in the industry.
Key Responsibilities
- Develop and document tools, flows, and methodologies (TFM) for logic/RTL design of IPs and SoCs.
- Define and optimize logic design methodologies to improve power, performance, and area.
- Analyze retrospective data to identify gaps in quality and efficiency, driving incremental, evolutionary, or transformative changes to the existing TFM.
- Collaborate with logic design teams to define best practices and enable fast design convergence.
- Ensure seamless handoff and reuse between IPs and SoCs through robust design methodologies.
- Stay ahead of industry trends to ensure methodologies align with emerging architectures and process technology nodes.
Minimum Qualifications
- Bachelor's or BS degree in Electrical Engineering, Computer Engineering, or a related field.
- 3 years of experience with a Bachelor's degree, 2 years with a Master's degree, or 0 years with a PhD.
- Expertise in RTL design and verification processes.
- Proficiency with EDA tools used in logic design (e.g., synthesis, static timing analysis, formal verification).
- Strong programming and scripting skills (e.g., Python, Perl, TCL, or similar).
- Experience with logic design methodologies for advanced process nodes.
- Familiarity with power, performance, and area optimization techniques.
- Proven ability to collaborate across teams and disciplines to drive complex technical solutions.
- Strong analytical skills with the ability to identify and address design challenges.
Job Type
Experienced Hire
Shift
Shift 1 (United States of America)
Primary Location:
US, Texas, Austin
Additional Locations:
Business Group
Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $122,440.00 - 172,860.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Salary : $122,440 - $172,860