Clocking Design Engineer

Job Details

Job Description:

Do Something Wonderful!

Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and have a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

Who We Are

You will be a part of a high performing team specializing in clocking architecture, clock distribution network design, custom clock circuits, clock tree synthesis, and low power design for Intel's flagship IA cores in the most advanced process nodes.

Who You Are

Your responsibilities will include but not be limited to:

• Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.
• Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
• Conducts verification and signoff include formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
• Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.
• Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.
• Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.
• Optimizes CPU design to improve product level parameters such as power, frequency, and area.
• Participates in the development and improvement of physical design methodologies and flow automation.
• Good understanding with fundamentals of static timing analysis, clock related timing parameters, EM, IR, Place and Route flows.
• Strong understanding of sub-micron process technology and circuits.
• Excellent written and communication skills
• Works well independently and develops quick engineering solutions for complex problems
• Skilled at interfacing with engineers and managers by providing schedule updates
• High problem-solving skills and good tolerance for ambiguity
• Knows how to prioritize tasks independently
• Natural focus on quality, discipline, and accurate results for engineering customers
• Contributes and works well in a multi-site team setting
  
  

Qualifications

You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

• The ideal candidate must have a Master’s Degree in Electrical Engineering, Computer Engineering related STEM field with 3 years of experience listed below:
• Backend design and/or integration on leading edge process nodes
• Perl, TCL, or other industry-standard scripting languages High frequency clock distribution design and implementation, custom circuits and clock tree synthesis.
  

Preferred Qualifications

• Experience with computer architecture
• Experience with IA-32 assembly and/or Verilog programming experience
• Experience with validation or testing experience, especially in a silicon design team
  
  

Job Type

Experienced Hire

Shift

Shift 1 (United States of America)

Primary Location:

US, Texas, Austin

Additional Locations:

US, Oregon, Hillsboro

Business Group

The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003

Annual Salary Range for jobs which could be performed in the US: 139,710.00 USD - 262,680.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.