FPGA Verification Engineer

Title-FPGA Verification Engineer
Location-Mountain View, CA

Duration-Contract

Mode of Work-Onsite

Must Have Skills FPGA Verification Engineer
Skill 1 8 Years of in FPGA
Skill 2 5 Years of Exp in UVM
Skill 2 5 Years of Exp in System Verilog

Job Description
Strong understanding of FPGA design principles and architectures.
Proficiency in System Verilog and UVM verification methodology.
Experience with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS).
Knowledge of code coverage and functional coverage analysis.
Excellent debugging and problem-solving skills.
Strong communication and collaboration skills.

Requirements
Bachelor's or master's degree in electrical engineering, Computer Engineering, or a related field.
Experience in FPGA verification.
Experience with scripting languages (e.g., Python, Perl).
Familiarity with hardware description languages (e.g., VHDL, Verilog).

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.