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PCB layout Designer

Hierarch Soft Technologies, Inc.
San Francisco, CA Contractor
POSTED ON 9/13/2026
AVAILABLE BEFORE 10/12/2026

Role: PCB Layout Engineer
Experience:
5-8 Years
Location: Bay Area, CA 

Job Summary

We are looking for an experienced PCB Layout Engineer with 8 years of hands-on experience in PCB design and layout for high-speed electronic systems. The ideal candidate should have strong expertise in  Allegro or Expedition, along with experience in Signal Integrity, PCIe, DDR, and high-speed PCB design.

 

Key Responsibilities

  • Design and develop complex PCB layouts for high-speed electronic systems.
  • Create and maintain PCB layouts using Allegro or Expedition.
  • Work closely with hardware, electrical, and signal integrity engineers.
  • Perform PCB layout for PCIe, DDR, and other high-speed interfaces.
  • Apply signal integrity and power integrity principles during PCB layout.
  • Manage high-speed routing, impedance control, differential pairs, length matching, and timing requirements.
  • Review schematics, component placement, routing constraints, and PCB design requirements.
  • Support design reviews, layout verification, and manufacturing release.
  • Troubleshoot PCB layout issues and work with cross-functional teams to resolve design problems 

Required Skills

  • 5-8 years of PCB Layout experience
  • Strong hands-on experience with Allegro or Expedition
  • Experience with Signal Integrity (SI)
  • Strong experience with high-speed PCB layout
  • Hands-on experience with PCIe
  • Hands-on experience with DDR/DDR memory interfaces

Regards

Hourly Wage Estimation for PCB layout Designer in San Francisco, CA
$35.00 to $49.00
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