What are the responsibilities and job description for the Design Verification Engineer position at HCLTech?
Strong expertise along-with complex SoC/IP debug is must
At-least 5+ years of experience in System Verilog HVL and C/C++. Overall-7+ yrs exp.
AMBA AXI bus protocols along-with ARM or C based processor
Bi-frost/Processor(Highly pref) based C and SV/UVM mix Verification. (Arm based
processor)
Experience in complete verification cycle which includes development of test plan,
BFM/Driver/Monitor/Scoreboard component development and integration in test
bench, stress/corner testing, failure debug, gate level simulations, assertions, and
coverage closure.
Verification closure with team
Make/Perl/Python(GTH)
Ensure customer satisfaction.
Reporting to customer on daily or weekly progress effectively
Job Types: Full-time, Contract
Salary : $150,000 - $160,000
