Demo

Advanced ASIC FPGA Design Engineer

General Dynamics
Scottsdale, AZ Full Time
POSTED ON 10/15/2026
AVAILABLE BEFORE 11/14/2026
Basic Qualifications

Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 5 years of relevant experience; or Master's degree plus a minimum of 3 years of relevant experience.

CLEARANCE REQUIREMENTS: Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.

Responsibilities for this Position

What You'll Do
  • Architect and implement high-performance FPGA designs in VHDL and/or Verilog targeting Xilinx and Microchip device families.
  • Perform synthesis, place-and-route, and timing closure using Vivado or Libero, including advanced techniques such as pipelining, register retiming, floorplanning, and physical optimization
  • Develop and execute block-level simulations using QuestaSim/ModelSim with code coverage analysis (statement, branch, condition, expression)
  • Create self-checking testbenches for correctness verification
  • Design high-speed interfaces for inter-module communication and system integration
  • Collaborate with systems engineers, software developers, and verification engineers in an Agile development environment
  • Participate in design reviews, peer code reviews, and documentation of design specifications and interface control documents
  • Contribute to CI/CD pipeline development for automated synthesis, simulation regression, and coverage tracking
  • Support integration and lab bring-up activities, including on-target FPGA debug using ILAs and JTAG-based tools
Required Qualifications
  • Strong proficiency in VHDL and/or Verilog/SystemVerilog for synthesizable RTL design
  • Hands-on experience with Xilinx Vivado Design Suite or Microchip Libero for synthesis, implementation, and timing analysis
  • Experience targeting Xilinx and Microchip device families
  • Ability to achieve timing closure on designs at 300 MHz clock rates
  • Experience with FPGA simulation tools (QuestaSim or ModelSim)
  • Proficiency in writing self-checking testbenches with automated pass/fail determination
  • Understanding of high-speed digital design principles: pipelining, clock domain crossing (CDC), metastability mitigation, and synchronous design
  • Experience with AXI-Stream, AXI4, or similar on-chip bus protocols
  • Ability to read and interpret timing reports, utilization summaries, and critical-path analysis output
  • Strong written and verbal communication skills for design documentation and technical presentations
  • S. Citizenship and ability to obtain/maintain a Secret security clearance
Preferred Qualifications
  • Experience with cryptographic algorithm implementation in hardware (AES, GCM, SHA, ECC, RSA, or similar)
  • Experience with high-speed serial interfaces: PCIe, Ethernet (10G/25G/100G), Fibre Channel, Aurora, or GTY/GTM transceivers
  • Experience with CI/CD pipelines for FPGA development (GitLab CI) including automated synthesis and regression testing
  • Proficiency in scripting languages (Tcl, Python, Bash) for build automation and design flow scripting
  • Experience with version control systems (GitLab) and collaborative development workflows
  • Experience with Xilinx IP cores: FIFO Generator, Clock Wizard, MIG/DDR controllers, DMA/Bridge subsystems
  • Experience with embedded processors in FPGA (MicroBlaze, Zynq PS, Versal AI Engine)

#CJ3

Salary Note

This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.

Combined Salary Range

USD $135,396.00 - USD $150,205.00 /Yr.

Company Overview

General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000 top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!

Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans

Salary : $135,396 - $150,205

If your compensation planning software is too rigid to deploy winning incentive strategies, it’s time to find an adaptable solution. Compensation Planning
Enhance your organization's compensation strategy with salary data sets that HR and team managers can use to pay your staff right. Surveys & Data Sets

What is the career path for a Advanced ASIC FPGA Design Engineer?

Sign up to receive alerts about other jobs on the Advanced ASIC FPGA Design Engineer career path by checking the boxes next to the positions that interest you.
Income Estimation: 
$104,754 - $125,215
Income Estimation: 
$134,206 - $155,125
Income Estimation: 
$104,754 - $125,215
Income Estimation: 
$134,206 - $155,125
Employees: Get a Salary Increase
View Core, Job Family, and Industry Job Skills and Competency Data for more than 15,000 Job Titles Skills Library

Job openings at General Dynamics

  • General Dynamics Washington, DC
  • Type of Requisition: Regular Clearance Level Must Currently Possess: Top Secret Clearance Level Must Be Able to Obtain: Top Secret/SCI Public Trust/Other R... more
  • 6 Days Ago

  • General Dynamics Annapolis, MD
  • Basic Qualifications Requires a Bachelor's degree in Electrical Engineering, or a related Science, Engineering or Mathematics field. Also requires 15 years... more
  • 6 Days Ago

  • General Dynamics Dedham, MA
  • Basic Qualifications Requires a Bachelor's degree in Software Engineering, or a related Science, Engineering or Mathematics field. Agile experience preferr... more
  • 6 Days Ago

  • General Dynamics Pittsfield, MA
  • Basic Qualifications Bachelor's degree in Systems Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 5 years of relevan... more
  • 6 Days Ago


Not the job you're looking for? Here are some other Advanced ASIC FPGA Design Engineer jobs in the Scottsdale, AZ area that may be a better fit.

  • Microchip Technology Inc. Chandler, AZ
  • Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the wo... more
  • 12 Days Ago

  • Honeywell Aerospace Tempe, AZ
  • Job Description As an Advanced Mechanical Design Engineer here at Honeywell Aerospace, you will be instrumental in developing sophisticated mechanical desi... more
  • 14 Days Ago

AI Assistant is available now!

Feel free to start your new journey!