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FPGA Design - Lead Research Engineer "CLEARANCE REQUIRED"

GE Vernova
Schenectady, NY Full Time
POSTED ON 8/16/2026
AVAILABLE BEFORE 10/16/2026
Job Description Summary. As an FPGA Design Research Engineer, you will have the opportunity to architect and develop state-of-the-art embedded systems for real-

Salary.com Estimation for FPGA Design - Lead Research Engineer "CLEARANCE REQUIRED" in Schenectady, NY
$95,003 to $109,428
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