What are the responsibilities and job description for the Silicon Design Package Engineer position at Galactic Minds INC?
Job Title – Silicon Design Package Engineer
Location – Santa Clara, CA (Onsite)
Duration – Long term
Job Description:
This role is highly specialized in semiconductor packaging design, requiring strong EDA tool proficiency and knowledge of advanced packaging technologies
Tools & Knowledge:
Mentor/Siemens and Cadence tools (especially for Package Layout Automation - PLA).
Technical Expertise:
Multi-layer package design experience.
Understanding of substrate manufacturing Design Rules and Assembly Rules.
Familiarity with SIPI (Signal Integrity & Power Integrity) Rules.
Flip-chip package design concepts