What are the responsibilities and job description for the DFT (Design for Test) Engineer- Santa Clara, CA position at Floga technologies?
Hello,
Good afternoon,
I'm Rahul from Floga Technologies. We are a growing IT services organization delivering scalable technology solutions and are expanding our team with qualified talent.
We have an immediate opening for a DFT (Design for Test) Engineer with strong hands-on experience to support a long-term engagement with our client. Must collaborate effectively with cross-functional teams to deliver high-quality solutions.
Title: DFT (Design for Test) Engineer
Location: santa clara, CA
Visa: Any Visa
Role Description:
Hands-on experience with the Siemens Tessent (Mentor Graphics) DFT tool suite.
Strong understanding of DFT fundamentals, including controllability, observability, scan insertion, and scan-based testing.
Expertise in ATPG (Automatic Test Pattern Generation), including pattern generation, analysis, debugging, and fault coverage improvement.
Experience with MBIST (Memory Built-In Self-Test), including memory test architecture, implementation, and diagnostics.
Good knowledge of IO Test methodologies for interface and pin-level validation.
Strong understanding of Clock DFT and clock verification concepts.
Solid foundation in Digital Design and RTL (Verilog/SystemVerilog).
Experience with industry-standard DFT/ATPG EDA tools.
Experience in verification of DFT features, including Boundary Scan (JTAG), IJTAG, MBIST, High-Speed Scan Testing, and other DFT methodologies.
Excellent analytical, debugging, and problem-solving skills.