What are the responsibilities and job description for the DFx Verification Engineer position at Exl Neo Technologies?
DFx Verification Engineer
Location: - Santa Clara, CA (Onsite)
Exp Range: - 5-20 Years of experience
Long Term Contract (12 Months ) / Full Time Position
JD
Key Responsibilities
- Develop and execute verification plans for DFx features including:
- Scan (stuck-at, transition fault)
- MBIST / LBIST
- Boundary Scan (JTAG)
- Memory repair and redundancy
- Low-power test scenarios
- Create and maintain testbenches using SystemVerilog/UVM for DFx validation
- Verify:
- Scan chain integrity and connectivity
- Test mode functionality and coverage
- ATPG pattern validation and debug
- BIST controllers and memory test logic
Technical Skills
- Strong knowledge of:
- DFT concepts (Scan, ATPG, MBIST, JTAG)
- Digital design fundamentals
- Expertise in:
- System Verilog and UVM
- Simulation tools (VCS, Xcelium, Questa)
- Familiarity with:
- ATPG tools (TetraMAX, Modus, FastScan)
- Debug tools (Verdi, DVE)
- Understanding of:
- Low-power design (UPF/CPF)
- Clocking and reset strategies